LAN9354T/ML - 3-Port 10/100 Managed Ethernet Switch | Microchip
N.º da peça: LAN9354T/ML ✓ AtivoLAN9354T/ML Visão geral
An Ethernet switch is a physical-layer bridging device that takes frames from one port and forwards them to the appropriate output port based on MAC address lookup. A managed switch adds a control plane - here via I2C plus an optional web-based GUI - so the design engineer can configure port speed, auto-negotiation, VLAN tagging, QoS priority, port mirroring, and link aggregation from firmware rather than with external PHY chips. In the hierarchy, LAN9354T/ML sits as an interface IC (Ethernet switch controller) above the PHY level and below the network processor or MCU layer of an embedded system.
Key features include three integrated 10/100 ports, RMII connectivity to a host processor for a copper PHY port, I2C-based register access for host or EEPROM configuration, support for both 10 Mbps and 100 Mbps links with auto-negotiation, and programmable options for boot-time configuration. Rated power dissipation is approximately 1.148 W, which makes copper pour area on the exposed thermal pad the dominant thermal design variable rather than a heat sink.
Architecturally the LAN9354 combines a multi-port 10/100 MAC, an integrated switch fabric with per-port QoS and traffic prioritization, an RGMII/RMII-capable host-side data path, and an SMI/I2C register block. The RMII path reduces host pin count relative to MII by roughly half while still supporting full-duplex 100 Mbps operation, and the same 56-pin footprint consolidates PHY, MAC, and switch logic that would otherwise require three discrete PHYs plus an external switch ASIC.
Typical applications include embedded Linux gateways, industrial HMI and PLC connectivity, USB-to-Ethernet and industrial serial-to-Ethernet bridges, IP camera and access-control peripherals, and networked embedded test equipment. The device is also used where a board needs to add two extra copper ports while keeping the host on a single RMII link.
When designing around the LAN9354T/ML, budget input and output decoupling close to the supply pins, treat the exposed pad as the primary heat path, and confirm that the host processor exposes a compatible RMII interface at 50 MHz. Auto-negotiation and managed features should be validated against the target switch partner PHY, since switch-level link training and pause-frame handling differ from standalone PHY behaviour.
This page consolidates verified distributor pricing, a drop-in alternative set for the 56-QFN footprint, and practical thermal and layout guidance that is not presented together in the original manufacturer material.
Alternativas drop-in para LAN9354T/ML — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.
Variantes desta série
Modelos da mesma série compatíveis como drop-in com LAN9354T/ML (mesmo formato e footprint) — diferindo em Number of Ports, Package, Data Rate, Device Type.
LAN9354TI/ML
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
LAN9354i/ML
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
LAN9354/ML
✅ Drop-InConsulte o preço
Ver ficha técnica →LAN9353/ML
✅ Drop-In ⚠️ Especificações não verificadas📋 Alternativa de referência (fora do catálogo)
KSZ9031RNXIA
✅ Drop-In ⚠️ Especificações não verificadasConsulte o preço
Ver ficha técnica →LAN9354T/ML Classificações máximas e características elétricas
| Device Type | 3-Port Managed 10/100 Ethernet Switch with RMII |
| Number of Ports | 3 integrated ports |
| Taxa de dados | 10 Mbps / 100 Mbps per port |
| Ethernet Standard | 10/100BASE-T/TX |
| Host Interface | RMII |
| Management Interface | I2C (SMI), EEPROM/SPI boot, web-based GUI |
| Programming | Programmable (host/EEPROM configuration) |
| Encapsulamento | 56-QFN (8x8 mm) with exposed pad |
| Contagem de pinos | 56 pins |
| Tipo de montagem | Surface Mount |
| Power Dissipation | 1.148 W |
| Delivery Format | Tray |
| Product Status | Active |
| Application Optimization | Consumer, embedded and industrial electronic designs |
Guia de Configuração de Pinos do LAN9354T/ML 56-qfn (8x8 mm) with exposed pad
Configuração de pinos para LAN9354T/ML (pacote 56-qfn (8x8 mm) with exposed pad). A numeração dos pinos, funções e diagramas de conexão estão definidos no datasheet do fabricante. Consulte-o para o footprint exato e diretrizes de soldagem.
Nenhum dado detalhado de pinagem disponível para LAN9354T/ML.
Consulte a ficha técnica para a configuração completa dos pinos.
Aplicações típicas
LAN9354T/ML é adequado para 6 aplicaçãos: Embedded Linux IoT Gateway, Industrial HMI and PLC Connectivity, USB-to-Ethernet and Serial-to-Ethernet Bridges, IP Camera and Access-Control Peripherals, Networked Test and Measurement Equipment, Multi-Port Automotive and Building Network Nodes.
Embedded Linux IoT Gateway
The LAN9354T/ML gives an embedded Linux gateway three copper 10/100 ports - one for the WAN uplink and two for downstream devices - from a single 56-QFN (8x8 mm) device. The RMII interface connects directly to a host processor such as the ATSAM4S2CB-AN-class MCU or an STM32F429-class part, so the processor MAC handles the frame path while the switch fabric handles inter-port forwarding. The I2C management block lets firmware read link status, enforce port priority and mirror traffic for debugging. Because the switch is 10/100 only, keep WAN aggregation on a separate Gigabit PHY such as the DP83822HRHBR where throughput matters, and treat the LAN9354T/ML as the low-speed port concentrator.
Recomendado
Industrial HMI and PLC Connectivity
Industrial panels and PLCs typically need several isolated-looking but copper-coupled 10/100 links for a supervisory network, a local HMI link and a service port. The LAN9354T/ML consolidates those three 10/100BASE-T/TX ports into one 8x8 mm QFN, freeing board area in space-constrained DIN-rail equipment while retaining managed features such as port configuration and QoS prioritisation over I2C. The roughly 1.148 W dissipation is handled by a solid exposed-pad pour rather than a heat sink. For harsh environments, specify the LAN9354i/ML or LAN9354TI/ML industrial-temperature variants in the identical footprint, and pair the switch with an isolated transceiver such as the ISO1432DWR-class protection where the field side needs surge and isolation.
Recomendado
USB-to-Ethernet and Serial-to-Ethernet Bridges
In a USB-to-Ethernet dongle, the LAN9354T/ML provides the copper-facing ports while the host side is handled by a USB controller with an embedded Ethernet MAC, such as the CP2102N-A01-GQFN20R-class part or a USB-to-Ethernet bridge controller. Because the LAN9354T/ML offers RMII in addition to I2C, it can sit between a USB-to-Ethernet controller and an additional PHY to add a second copper port without a second switch ASIC. The three-port configuration also suits dual-port industrial gateways where one port is a maintenance/service link and two are production-network ports. Because the device is managed, a PC-based configuration tool over I2C can enable loopback or port diagnostics in the field, a capability unmanaged switches such as the LAN9353/ML cannot offer.
Recomendado
IP Camera and Access-Control Peripherals
IP cameras and access-control panels need one 10/100 link for the network and often a second link for a PoE or direct-attached sensor bus, plus a service port. The LAN9354T/ML gives the camera electronics three 10/100BASE-T/TX ports in a single 8x8 mm QFN footprint, which directly reduces board area compared with two discrete PHYs. The managed register set allows the camera firmware to force 100 Mbps full duplex on the uplink, prioritise the video stream over background traffic through QoS, and mirror a port for diagnostics. Use the exposed thermal pad as the primary heat path because the 1.148 W rating is manageable with copper pour alone, and bring the design to the LAN9354i/ML variant if the enclosure runs hot.
Recomendado
Networked Test and Measurement Equipment
Data acquisition and instrumentation products often need to separate the instrument control traffic from the data path, and the LAN9354T/ML provides a managed way to do that in an 8x8 mm footprint. One port connects to the instrument's host processor over RMII, a second connects to a remote trigger or fixture, and a third is exposed as a service port for calibration. Because the switch is managed over I2C, the instrument firmware can enable port mirroring to capture traffic for troubleshooting and apply QoS so that time-critical acquisition frames are not delayed behind bulk transfers. The 1.148 W power dissipation fits comfortably in a sealed 1U/2U chassis where a heat sink would be unwelcome, provided the exposed pad has a dedicated thermal via array into the ground plane.
Recomendado
Multi-Port Automotive and Building Network Nodes
Building-automation controllers, HVAC controllers and service-vehicle telematics modules need several 10/100 nodes on a single board, and the LAN9354T/ML delivers three managed 10/100 ports without the area penalty of discrete PHYs. The managed capability matters in these systems because firmware must prioritise alarm and control frames over bulk telemetry and must be able to disable a faulty port after a short. The switch is not sold as an AEC-Q100 qualified device, so automotive programs requiring that qualification should treat the LAN9354i/ML industrial variant as an interim step or source an explicitly qualified part. In building and HVAC equipment the same topology supports a controller backbone port plus two room or unit ports over a single 8x8 mm device.
Recomendado
Resumo dos produtos recomendados
Dados de referência de engenharia para LAN9354T/ML — comparação, orientação de projeto e informações de conformidade.
Guia de seleção
Comparação com alternativas
| Parâmetro | Este produto | LAN9354TI/ML | LAN9354i/ML | LAN9354/ML | LAN9353/ML | KSZ9031RNXIA |
|---|---|---|---|---|---|---|
| Package | QFN-56 (8x8 mm) EP - tray | QFN-56 (8x8 mm) EP - same | QFN-56 (8x8 mm) EP - same | QFN-56 (8x8 mm) EP - same | QFN-56 (8x8 mm) EP - same | QFN-56 (8x8 mm) EP - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Port Count | 3 | 3 | 3 | 3 | 3 | 3 |
| Data Rate | 10/100 Mbps per port | 10/100 Mbps per port | 10/100 Mbps per port | 10/100 Mbps per port | 10/100 Mbps per port | 10/100 Mbps per port |
| Host Interface | RMII + I2C | RMII + I2C | RMII + I2C | I2C only - no RMII data path | No host data interface (unmanaged) | SPI/parallel host interface instead of RMII |
| Managed / Configurable | Yes - I2C managed, programmable | Yes - active/programmable | Yes - full-featured managed switch | Yes - I2C managed | No - unmanaged switching | Yes - managed |
Principais diferenciais
- Three integrated 10/100 ports plus RMII host interface in one 8x8 mm QFN (vs LAN9353/ML)
- RMII connectivity halves host pin count versus MII while keeping full-duplex 100 Mbps (vs LAN9354/ML)
- Industrial-grade siblings available in the exact same footprint (vs KSZ9031RNXIA)
Notas de projeto
The 56-QFN (8x8 mm) package has no leads, so the exposed pad is the only meaningful heat path. Rated dissipation is approximately 1.148 W. Estimated: with a full-pad pour and roughly 40-60 C/W junction-to-ambient on a 2-layer board, the junction rise would be about 45-70 C above ambient - acceptable for a 105 C industrial ambient only if the pour is unbroken. Do not split the ground plane under the device, and add a 4x4 array of thermal vias connecting the pad to the inner ground plane.
Place the 10 uF and 0.1 uF decoupling capacitors for each supply rail immediately adjacent to the corresponding supply and ground pins on the same PCB layer, with the ground return through the via field next to the capacitor rather than through a distant plane connection. Keep the 25 MHz or 50 MHz clock source short and tightly referenced to ground, and route the RMII clock and data as a matched, length-controlled group away from the switch fabric's high-speed internal routing. Continuous copper under the QFN body on all four sides avoids impedance discontinuities into the exposed pad.
The LAN9354T/ML integrates PHY analog circuitry, so its layout rules differ from a pure digital switch: keep the digital RMII traces on a separate layer from the magnetics-facing PHY section, and route each 10/100 differential pair as a tightly coupled 100-ohm differential pair with symmetric length matching and no stubs. Provide an isolated analog ground region under the PHY supply filter network and stitch it to the main ground with a single low-impedance point if the design guide requires it. Never run switching nodes or high-current LED drive traces beneath the PHY area.
Three mistakes recur in LAN9354 designs. First, treating the device as Gigabit - it is a 10/100 switch and will not autonegotiate at 1000 Mbps. Second, assuming the I2C-only LAN9354/ML can replace the RMII-equipped LAN9354T/ML - the footprint is identical but the host data path is missing, so the processor Ethernet MAC cannot connect. Third, forgetting the thermal pad connection; with 1.148 W dissipation, an unconnected exposed pad will cause thermal shutdown. Verify the EEPROM/SPI boot configuration path before first power-up so the switch comes up in the intended mode.
Informações de conformidade
The Microchip LAN9354 product page states the device is application-optimized for consumer, embedded and industrial designs. RoHS, REACH, lead-free and halogen-free declarations were not present in the verified source set for this page and are reported as unknown rather than assumed. The part is not marketed as AEC-Q100 qualified, so automotive programs should source an explicitly qualified alternative.
