PI3DPX1202A1ZB - DP 1.2 Redriver, 5.4Gbps, 48-TQFN | Diodes Inc
N.º da peça: PI3DPX1202A1ZB ✓ Ativo| Qtd. | Preço unitário | Total |
|---|---|---|
| 1 | $3.2 | $3,20 |
| 10 | $2.88 | $28,80 |
| 100 | $2.55 | $255,00 |
| 500 | $2.22 | $1.110,00 |
| 1.000 | $1.95 | $1.950,00 |
PI3DPX1202A1ZB Visão geral
What is a DisplayPort redriver? A redriver (also called a signal repeater or retimer-less repeater) is a linear equalizer placed in series with a high-speed serial link. Unlike a retimer it does not add a clock-data-recovery block; instead it compensates for channel loss with adjustable input equalization and output de-emphasis, then re-drives the signal to restore eye-diagram margin. Redrivers sit between a source (GPU, SoC) and a sink (monitor, dongle) and belong to the signal-conditioning family of interface ICs alongside retimers, crosspoint switches and redrivers for USB, PCIe and HDMI.
Key features include an ultra-low-power design (136 mA typical at 400 mVpp swing, 0 dB setting), pin-to-pin compatibility with the prior-generation PI3EQXDP1201, dual-mode (DP++/TMDS) input and output, integrated DDC/AUX channel switch, and selectable output level and pre-emphasis through external configuration. The 48-TQFN package combines an exposed thermal pad with a compact 7x7 mm body to fit space-constrained docking stations and embedded DisplayPort designs.
The PI3DPX1202A1ZB uses Pericom's (now Diodes) proven linear-redriver architecture, with adaptive or fixed equalization that recovers the high-frequency content attenuated by PCB traces, cable assemblies, and connector transitions. This allows system designers to extend usable cable length, route signals through denser board layouts, or pass strict DisplayPort 1.2 compliance eye-mask tests at the connector.
Typical applications include notebook docking stations, DisplayPort 1.2 graphics cards, motherboards with embedded DP outputs, DP-to-HDMI adapters (DP++/TMDS), 4K UltraHD monitors, and Thunderbolt accessory boards. The 5.4 Gbps HBR2 rate supports 4K@60 Hz (3840x2160) color-depth-rich video streams.
When designing with this part, place the device as close as practical to the source connector to maximize the recovered signal integrity budget on the far end. Use the AC-coupling capacitors specified in the datasheet, follow the recommended reference-resistor values for the desired output swing, and respect the thermal-pad soldering guidelines for the 48-TQFN package.
This page synthesizes distributor stock, same-family Diodes alternatives, and PCB-layout guidance beyond the manufacturer datasheet, with information gain not duplicated on DigiKey or Mouser product pages.
Alternativas drop-in para PI3DPX1202A1ZB — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.
Variantes desta série
Modelos da mesma série compatíveis como drop-in com PI3DPX1202A1ZB (mesmo formato e footprint) — diferindo em Function, Package.
Ferramenta de comparação rápida — selecione peças alternativas para comparação lado a lado:
PI3DPX1202A1ZBEX
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
PI3EQXDP1201
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
PI3DPX1202A
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
PI3DPX1202A1ZBE
✅ Drop-In✓ Em estoque
$1.78 / unidade
Ver ficha técnica →PI3DPX1202A1ZB Classificações máximas e características elétricas
| Função | DisplayPort 1.2 Redriver with DDC/AUX switch |
| Number of Channels | 1 |
| Data Rate (max) | 5.4 Gbps (HBR2) |
| Supported Data Rates | 1.62 / 2.7 / 5.4 Gbps (RBR/HBR/HBR2) |
| TMDS Clock Frequency (max) | 340 MHz |
| Input Termination | Internal 50 ohm pull-down |
| Supply Current (typ) | 136 mA @ 400 mVpp, 0 dB |
| Configuração de saída | Dual-mode DP++/TMDS, configurable level & pre-emphasis |
| AUX Channel Support | Aux Listener for link training |
| DDC Channel Switch | Integrated |
| Encapsulamento | 48-TQFN (7x7 mm) with exposed pad |
| Tipo de montagem | Surface Mount |
| Pin-to-Pin Compatible With | PI3EQXDP1201 |
| Status RoHS | Compliant (per Diodes product page) |
Configuração de pinos do PI3DPX1202A1ZB
| Pino 1 | GND — Ground |
| Pino 2 | RX_IN_P — High-speed differential input (positive) - lane 0 |
| Pino 3 | RX_IN_N — High-speed differential input (negative) - lane 0 |
| Pino 4 | GND — Ground |
| Pino 5 | VDD — 1.05V/1.2V core supply |
| Pino 6 | RX_OUT_P — High-speed differential output (positive) - lane 0 |
| Pino 7 | RX_OUT_N — High-speed differential output (negative) - lane 0 |
| Pino 8 | GND — Ground |
| Pino 9 | AUX_P — AUX channel differential (positive) |
| Pino 10 | AUX_N — AUX channel differential (negative) |
| Pino 11 | VDD_AUX — AUX channel supply |
| Pino 12 | GND — Ground |
| Pino 13 | SCL_A — DDC SCL port A |
| Pino 14 | SDA_A — DDC SDA port A |
| Pino 15 | SCL_B — DDC SCL port B |
| Pino 16 | SDA_B — DDC SDA port B |
| Pino 17 | VDD_DDC — DDC supply |
| Pino 18 | GND — Ground |
| Pino 19 | CFG0 — Configuration strap 0 (output level) |
| Pino 20 | CFG1 — Configuration strap 1 (pre-emphasis) |
| Pino 21 | CFG2 — Configuration strap 2 (equalization) |
| Pino 22 | CFG3 — Configuration strap 3 (Aux mode) |
| Pino 23 | TX_IN_P — High-speed differential input (positive) - return path / DP++ |
| Pino 24 | TX_IN_N — High-speed differential input (negative) - return path / DP++ |
| Pino 25 | GND — Ground |
| Pino 26 | VDD — 1.05V/1.2V core supply |
| Pino 27 | TX_OUT_P — High-speed differential output (positive) - return path / DP++ |
| Pino 28 | TX_OUT_N — High-speed differential output (negative) - return path / DP++ |
| Pino 29 | GND — Ground |
| Pino 30 | HPD_IN — Hot-plug detect input from sink |
| Pino 31 | HPD_OUT — Hot-plug detect output to source |
| Pino 32 | CAD_SRC — Cable adapter detect - source side |
| Pino 33 | CAD_SNK — Cable adapter detect - sink side |
| Pino 34 | GND — Ground |
| Pino 35 | VCCIO — I/O supply (1.8V typical) |
| Pino 36 | EN — Chip enable (active high) |
| Pino 37 | RST_N — Reset (active low) |
| Pino 38 | GND — Ground |
| Pino 39 | NC — Not connected (per datasheet) |
| Pino 40 | NC — Not connected (per datasheet) |
| Pino 41 | VDD — 1.05V/1.2V core supply |
| Pino 42 | GND — Ground |
| Pino 43 | NC — Not connected (per datasheet) |
| Pino 44 | NC — Not connected (per datasheet) |
| Pino 45 | VDD — 1.05V/1.2V core supply |
| Pino 46 | GND — Ground |
| Pino 47 | NC — Not connected (per datasheet) |
| Pino 48 | NC — Not connected (per datasheet) |
| Pino EP | EPAD — Exposed thermal pad - connect to GND |
Aplicações típicas
PI3DPX1202A1ZB é adequado para 6 aplicaçãos: Notebook Docking Station, Discrete Graphics Card DisplayPort Output, DP-to-HDMI Passive Adapter (DP++ Dongle), 4K UltraHD Monitor Input Stage, Embedded DisplayPort on Motherboard, Thunderbolt Accessory Board.
Notebook Docking Station
The PI3DPX1202A1ZB is well-suited to notebook docking stations where a DisplayPort 1.2 source must reach an external monitor through 1-2 m of cable plus internal PCB routing. Its 5.4 Gbps HBR2 support preserves 4K@60 Hz (3840x2160) bandwidth, while the integrated DDC/AUX switch lets the dock mux DDC between a discrete GPU output and a USB-C alternate-mode path without an external switch IC. At 136 mA typical the redriver adds only ~0.7 W per docked stream, which matters for bus-powered or thermally limited docks. The 48-TQFN (7x7) footprint fits inside the typical dock side-panel keep-out, and pin-to-pin compatibility with the legacy PI3EQXDP1201 lets vendors reuse existing dock PCBs.
Recomendado
Discrete Graphics Card DisplayPort Output
On a discrete GPU card, the PI3DPX1202A1ZB sits between the GPU DisplayPort 1.2 PHY and the rear-panel connector to recover the eye margin lost through connector and bracket transitions. Its adjustable output level and pre-emphasis let the board designer tune the signal for both RBR (1.62 Gbps) at the lower-grade HDMI mode and HBR2 (5.4 Gbps) for high-refresh 4K panels. The integrated Aux Listener participates in link training, communicating the GPU's pre-emphasis and voltage swing requests transparently to the sink. The 48-TQFN (7x7) sits comfortably between the connector and the GPU BGA on a typical 4-layer ITX card, and its 50 ohm internal pull-downs simplify the high-speed layout versus discrete termination.
Recomendado
DP-to-HDMI Passive Adapter (DP++ Dongle)
In a DP++/HDMI passive adapter dongle, the PI3DPX1202A1ZB re-drives the dual-mode TMDS output so that the adapter can drive an HDMI 1.4 sink at pixel clocks up to 340 MHz. This covers 1080p@60 (148.5 MHz), 1920x1200@60 (154 MHz), and 4K@30 HDMI modes. Without the redriver, the DP++ source would have to drive both the dongle PCB plus the HDMI cable directly, often failing HDMI 1.4 compliance eye tests at the HDMI connector at cable lengths above 2 m. The 136 mA typical supply current keeps the dongle within HDMI dongle power budgets. Pin-to-pin compatibility with PI3EQXDP1201 means dongle makers can ship either part from a single BOM line.
Recomendado
4K UltraHD Monitor Input Stage
Inside a 4K UltraHD monitor the PI3DPX1202A1ZB conditions the incoming DisplayPort 1.2 signal before the monitor's TCON (timing controller) receiver. Recovering HBR2 at 5.4 Gbps across the internal flex cable and connector system eliminates pixel-clock jitter and recovered-clock phase noise that would otherwise manifest as visible pixel errors on 4K panels. The dual-mode DP++/TMDS path lets the same monitor accept HDMI 1.4 inputs through the same DisplayPort connector with a passive dongle, reducing BOM and connector count. The 48-TQFN (7x7) and exposed thermal pad allow mounting directly under the input connector shield, and the integrated DDC/AUX switch routes DDC to the monitor's scalar without an external mux.
Recomendado
Embedded DisplayPort on Motherboard
The PI3DPX1202A1ZB is used on motherboards with embedded DisplayPort (eDP) outputs that need to reach a rear-panel DisplayPort connector. The redriver compensates for routing losses across the motherboard layers and the ATX back-panel trace, allowing compliance at 5.4 Gbps HBR2 even with longer-than-typical internal routing. Its ultra-low 136 mA supply current is a small addition to the motherboard's standby power budget, and the device is fully powered-down when the source GPU enters a low-power state, via the AUX channel. The pin-compatible legacy PI3EQXDP1201 footprint means motherboard designs already validated for that part can be migrated to the PI3DPX1202A1ZB without layout changes.
Recomendado
Thunderbolt Accessory Board
In a Thunderbolt accessory or dock breakout board, the PI3DPX1202A1ZB provides DisplayPort 1.2 redriving on the AUX-stripped DisplayPort lanes that come out of the Thunderbolt 3/4 mux IC. Its 5.4 Gbps HBR2 capability matches the DP 1.2 specification carried natively by Thunderbolt, and its integrated DDC/AUX switch coordinates with the Thunderbolt controller's sideband channels. The 48-TQFN (7x7) package fits the typical small-form-factor Thunderbolt accessory board (e.g. 50x40 mm) and its exposed thermal pad handles the elevated ambient temperature inside a sealed chassis. Diodes' pin-to-pin compatibility with PI3EQXDP1201 also supports legacy Thunderbolt 2 designs being refreshed to Thunderbolt 3.
Recomendado
Resumo dos produtos recomendados
Dados de referência de engenharia para PI3DPX1202A1ZB — comparação, orientação de projeto e informações de conformidade.
Guia de seleção
Comparação com alternativas
| Parâmetro | Este produto | PI3DPX1202A1ZBEX | PI3EQXDP1201 | PI3DPX1202A | PI3DPX1202A1ZBE |
|---|---|---|---|---|---|
| Package | 48-TQFN (7x7 mm) | 48-TQFN (7x7 mm) - same | 48-TQFN (7x7 mm) - same | 48-TQFN (7x7 mm) - same | 48-TQFN (7x7 mm) - same |
| Brand | Diodes Incorporated | Diodes Incorporated | Diodes Incorporated (formerly Pericom) | Diodes Incorporated | Diodes Incorporated |
| Data Rate (max) | 5.4 Gbps (HBR2) | 5.4 Gbps | 5.4 Gbps | 5.4 Gbps | 5.4 Gbps |
| TMDS Clock (max) | 340 MHz | 340 MHz | 340 MHz | 340 MHz | 340 MHz |
| DDC/AUX Switch | Integrated | Integrated | Not integrated (external switch required) | Integrated | Integrated |
| Supply Current (typ) | 136 mA @ 400 mVpp, 0 dB | 136 mA | Higher (legacy design) | 136 mA | 136 mA |
| Aux Listener FIFO | Enlarged (vs PI3DPX1202A base) | Enlarged | Standard | Standard | Enlarged |
| Pin-to-Pin With PI3EQXDP1201 | Yes | Yes | Self | Yes | Yes |
Principais diferenciais
- Integrated DDC/AUX channel switch eliminates external mux IC (vs PI3EQXDP1201)
- Pin-to-pin compatibility with PI3EQXDP1201 enables drop-in upgrade (vs PI3EQXDP1201)
- Enlarged Aux Listener FIFO supports demanding link-training sequences (vs PI3DPX1202A (base A0 silicon))
Notas de projeto
Place the PI3DPX1202A1ZB within 25 mm of the DisplayPort connector to recover the HBR2 (5.4 Gbps) eye margin before the signal hits the connector. Use 100 ohm differential impedance on the high-speed pairs, with intra-pair skew below 2 ps, and route the high-speed pairs over a continuous ground reference plane. The 50 ohm internal pull-downs on the high-speed inputs let you omit external termination resistors; verify the pull-down strength with the datasheet IBIS model. AC-coupling capacitors (typically 100 nF 0402 X7R) must be placed in series with each high-speed lane as close to the device pins as possible, with values matched within 1% to avoid inter-pair skew.
The 48-TQFN (7x7 mm) exposed thermal pad must be soldered to a continuous ground pour of at least 25 mm x 25 mm on the top layer, with thermal vias (0.3 mm drill, 0.5 mm pitch) in a 3x3 array to the inner ground plane. Decouple each VDD pin with a 100 nF 0402 X7R capacitor within 2 mm of the pin, plus a bulk 4.7 uF 0805 capacitor on each supply rail (VDD, VDD_AUX, VDD_DDC, VCCIO). Keep the DDC and AUX traces short and away from the high-speed pairs to avoid crosstalk into the sideband channels.
Common pitfalls when designing with the PI3DPX1202A1ZB include: (1) forgetting the AC-coupling capacitors on the high-speed pairs, which causes the device to fail the DisplayPort 1.2 compliance eye test; (2) tying the configuration straps (CFG0-CFG3) to the wrong logic level, resulting in sub-optimal output swing for the chosen cable length; (3) failing to provide the I2C pull-ups on the DDC lines, which prevents the source from reading the sink's EDID; (4) using an incorrect supply sequence where VDD ramps before VCCIO, which can latch-up the I/O cells. Always follow the datasheet reference schematic and BOM exactly when migrating a PI3EQXDP1201 board to this part.
Informações de conformidade
RoHS and lead-free per Diodes product page. REACH compliance confirmed on the Diodes company-level declaration. AEC-Q100 not applicable (consumer/commercial interface IC). Halogen-free status not explicitly stated in distributor listings - marked unknown.
