PIC18F4520-I/P - 8-Bit MCU 40MHz 32KB Flash DIP-40 | Microchip
N.º da peça: PIC18F4520-I/P ✓ Ativo| Qtd. | Preço unitário | Total |
|---|---|---|
| 1 | $6.95 | $6,95 |
| 10 | $6.2 | $62,00 |
| 100 | $5.45 | $545,00 |
| 500 | $4.85 | $2.425,00 |
| 1.000 | $4.25 | $4.250,00 |
PIC18F4520-I/P Visão geral
A microcontroller unit (MCU) integrates a processor core, program memory, data memory, and peripherals on a single die, forming the lowest tier of the embedded control hierarchy: embedded controller -> microcontroller -> system-on-chip. The PIC18 family extends the classic PIC16 RISC architecture with a C-compiler-optimized instruction set and an 8x8 single-cycle hardware multiplier.
Key features include nanoWatt Technology power management (Idle and Sleep modes with multiple wake sources), an internal oscillator block covering 31 kHz to 8 MHz with 4x PLL, a Fail-Safe Clock Monitor that safely shuts down the system if the primary clock fails, and a watchdog timer with its own independent RC oscillator.
The peripheral set comprises a 10-bit, up to 13-channel analog-to-digital converter, two CCP modules plus one enhanced CCP (ECCP) supporting PWM, capture and compare, an enhanced USART for serial communication, a Parallel Slave Port, three 16-bit timers plus one 8-bit timer, and an In-Circuit Debug/Programming interface (ICSP) using the PGC/PGD pins.
Typical applications include industrial control panels, motor control and relay driver boards, legacy equipment maintenance, hobbyist and educational prototyping, and laboratory instrumentation. The DIP-40 package is especially valuable for breadboarding, socketed field replacement, and through-hole production.
A key design consideration: the -I suffix specifies the industrial temperature range of -40C to +85C and a supply range of 4.2V to 5.5V; design the power rail and brown-out settings accordingly.
This page synthesizes distributor pricing, verified drop-in alternatives, complete pinout data, and practical design notes not found in the manufacturer datasheet.
Alternativas drop-in para PIC18F4520-I/P — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.
Variantes desta série
Modelos da mesma série compatíveis como drop-in com PIC18F4520-I/P (mesmo formato e footprint) — diferindo em Operating Temperature, Package, Timers, Mounting Type, Core.
Ferramenta de comparação rápida — selecione peças alternativas para comparação lado a lado:
PIC18F4525-I/PT
✅ Drop-In ⚠️ Especificações não verificadas✓ Em estoque
$4.18 / unidade
Ver ficha técnica →PIC18F4520-E/P
✅ Drop-In ⚠️ Especificações não verificadas✓ Em estoque
$4.78 / unidade
Ver ficha técnica →PIC18LF4520-I/PT
✅ Drop-In ⚠️ Especificações não verificadas✓ Em estoque
$5.21 / unidade
Ver ficha técnica →PIC18F452-I/P
✅ Drop-In✓ Em estoque
$5.1 / unidade
Ver ficha técnica →PIC18F4520-I/P Classificações máximas e características elétricas
| Core Architecture | 8-bit PIC18 RISC |
| Max Clock Frequency | 40 MHz |
| Performance | Up to 10 MIPS |
| Flash Program Memory | 32 KB (16K x 16) |
| SRAM | 1.536 KB |
| EEPROM | 256 B |
| Supply Voltage Range | 4.2 V to 5.5 V |
| I/O Lines | 36 |
| ADC Resolution | 10-bit |
| ADC Channels | Up to 13 |
| Timers | 1 x 8-bit, 3 x 16-bit |
| CCP / ECCP Modules | 2 x CCP, 1 x ECCP |
| Internal Oscillator | 31 kHz to 8 MHz with 4x PLL |
| Encapsulamento | 40-PDIP (0.600 inch) |
| Temperatura de operação | -40C to +85C |
| Tipo de montagem | Through Hole |
| Special Features | nanoWatt Technology, Fail-Safe Clock Monitor, WDT, ICSP/ICD |
Configuração de pinos do PIC18F4520-I/P
| Pino 1 | MCLR/VPP/RE3 — Master clear (reset) input / programming voltage / digital input |
| Pino 2 | RA0/AN0 — Port A digital I/O / analog input 0 |
| Pino 3 | RA1/AN1 — Port A digital I/O / analog input 1 |
| Pino 4 | RA2/AN2/VREF- — Port A digital I/O / analog input 2 / ADC negative reference |
| Pino 5 | RA3/AN3/VREF+ — Port A digital I/O / analog input 3 / ADC positive reference |
| Pino 6 | RA4/T0CKI/C1OUT — Port A I/O (open-drain) / Timer0 clock input / comparator 1 output |
| Pino 7 | RA5/AN4/SS/HLVDIN/C2OUT — Port A digital I/O / analog input 4 / SPI slave select / HLVD input / comparator 2 output |
| Pino 8 | RE0/RD/AN5 — Port E digital I/O / PSP read strobe / analog input 5 |
| Pino 9 | RE1/WR/AN6 — Port E digital I/O / PSP write strobe / analog input 6 |
| Pino 10 | RE2/CS/AN7 — Port E digital I/O / PSP chip select / analog input 7 |
| Pino 11 | VDD — Positive power supply (4.2 V to 5.5 V) |
| Pino 12 | VSS — Ground reference |
| Pino 13 | OSC1/CLKI/RA7 — Crystal oscillator input / external clock input / Port A I/O |
| Pino 14 | OSC2/CLKO/RA6 — Crystal oscillator output / clock output / Port A I/O |
| Pino 15 | RC0/T1OSO/T13CKI — Port C digital I/O / Timer1 oscillator output / Timer1/3 external clock input |
| Pino 16 | RC1/T1OSI/CCP2 — Port C digital I/O / Timer1 oscillator input / capture-compare-PWM 2 |
| Pino 17 | RC2/CCP1 — Port C digital I/O / capture-compare-PWM 1 |
| Pino 18 | RC3/SCK/SCL — Port C digital I/O / SPI clock / I2C clock |
| Pino 19 | RD0/PSP0 — Port D digital I/O / Parallel Slave Port bit 0 |
| Pino 20 | RD1/PSP1 — Port D digital I/O / Parallel Slave Port bit 1 |
| Pino 21 | RD2/PSP2 — Port D digital I/O / Parallel Slave Port bit 2 |
| Pino 22 | RD3/PSP3 — Port D digital I/O / Parallel Slave Port bit 3 |
| Pino 23 | RC4/SDI/SDA — Port C digital I/O / SPI data in / I2C data |
| Pino 24 | RC5/SDO — Port C digital I/O / SPI data out |
| Pino 25 | RC6/TX/CK — Port C digital I/O / USART transmit / synchronous clock |
| Pino 26 | RC7/RX/DT — Port C digital I/O / USART receive / synchronous data |
| Pino 27 | RD4/PSP4 — Port D digital I/O / Parallel Slave Port bit 4 |
| Pino 28 | RD5/PSP5 — Port D digital I/O / Parallel Slave Port bit 5 |
| Pino 29 | RD6/PSP6 — Port D digital I/O / Parallel Slave Port bit 6 |
| Pino 30 | RD7/PSP7 — Port D digital I/O / Parallel Slave Port bit 7 |
| Pino 31 | VSS — Ground reference |
| Pino 32 | VDD — Positive power supply (4.2 V to 5.5 V) |
| Pino 33 | RB0/INT0 — Port B digital I/O / external interrupt 0 |
| Pino 34 | RB1/INT1 — Port B digital I/O / external interrupt 1 |
| Pino 35 | RB2/INT2 — Port B digital I/O / external interrupt 2 |
| Pino 36 | RB3/CCP2 — Port B digital I/O / alternate capture-compare-PWM 2 output |
| Pino 37 | RB4/KB0 — Port B digital I/O (interrupt-on-change) / keypad bit 0 |
| Pino 38 | RB5/PGM/KB1 — Port B digital I/O / low-voltage programming pin / keypad bit 1 |
| Pino 39 | RB6/PGC/KB2 — Port B digital I/O / ICSP clock / keypad bit 2 |
| Pino 40 | RB7/PGD/KB3 — Port B digital I/O / ICSP data / keypad bit 3 |
Aplicações típicas
PIC18F4520-I/P é adequado para 6 aplicaçãos: Industrial Control Panels, DC Motor Control and PWM Drives, Educational and Hobbyist Prototyping, Legacy Equipment Maintenance and Repair, Battery-Powered Instrumentation, Serial Communication Nodes and Data Loggers.
Industrial Control Panels
The PIC18F4520-I/P is well suited to industrial control panels thanks to its 5V-tolerant supply range (4.2V-5.5V) matching legacy 24V-panel logic domains via simple level circuits, 36 I/O lines for relay and contactor drivers, and a 10-bit ADC with up to 13 channels for sensor loops such as 4-20 mA conditioners and thermistor dividers. The Fail-Safe Clock Monitor automatically reverts to a safe fallback oscillator if the primary clock fails, supporting uptime-critical panel operation, while the watchdog timer with its own independent RC oscillator provides autonomous reset supervision. Firmware executes at up to 10 MIPS with an 8x8 hardware multiplier, enough for PID control loops, and the 256-byte EEPROM retains calibration constants through power loss. The DIP-40 through-hole package also survives vibration and simplifies field replacement in socketed panel controllers.
Recomendado
DC Motor Control and PWM Drives
For brushed-DC and stepper motor control, the PIC18F4520-I/P offers one ECCP module with programmable dead time for half-bridge or full-bridge PWM plus two CCP modules for additional PWM or tachometer capture, all documented in the Microchip datasheet typical application circuits. The 8x8 single-cycle hardware multiplier accelerates PI speed-loop arithmetic at up to 10 MIPS, and the 10-bit ADC samples current shunts and back-EMF feedback for closed-loop operation. Quadrature or Hall inputs map onto RB0-INT0 through RB2-INT2 external interrupts with priority support. Running the PWM from the internal oscillator block (31 kHz to 8 MHz with 4x PLL) removes the crystal BOM cost in cost-sensitive drives, while nanoWatt Sleep modes cut idle standby draw between motor run cycles in battery-backed equipment.
Recomendado
Educational and Hobbyist Prototyping
The DIP-40 through-hole package makes the PIC18F4520-I/P a mainstay of electronics education, university labs, and hobbyist breadboard projects, since it plugs directly into standard 0.1-inch sockets and solderless breadboards without adapters. Programming uses low-cost ICSP tools (MPLAB PICkit 5 and earlier PICkit programmers) through just five pins: VPP/MCLR, VDD, VSS, RB6/PGC and RB7/PGD, per Microchip's product documentation. The C-compiler-optimized RISC core with extended instruction set and hardware multiply is beginner-friendly under MPLAB X, while the internal oscillator lets first projects run with zero external timing parts. The 10-bit ADC, USART, SPI/I2C peripherals, and 36 I/O lines give students exposure to the full embedded peripherals set in a single 5V-tolerant device.
Recomendado
Legacy Equipment Maintenance and Repair
The PIC18F4520-I/P is a preferred repair part for legacy 5V through-hole controllers built around the PIC18F452 and PIC16F877 generations: it shares the 40-PDIP footprint, and Microchip migration document 39647a confirms the PIC18F4520 as the direct extended-architecture successor to the PIC18F452. Repair technicians can recompile legacy firmware with the extended instruction set disabled and drop the new chip into the existing socket, restoring boards whose original silicon is scarce. The 32KB flash holds substantial re-implemented firmware, 256-byte EEPROM preserves stored settings, and the enhanced USART with supported baud rates handles restoration of serial front-panel links. Availability as an active part at major distributors as of 2026-10-12 makes it a safe long-term service stock item.
Recomendado
Battery-Powered Instrumentation
Although rated for 4.2V-5.5V, the PIC18F4520-I/P serves portable and benchtop instruments that run from 4x AA cells or 5V USB power by exploiting nanoWatt Technology power modes, per the Microchip datasheet. Sleep mode with the watchdog or an external interrupt on RB0/INT0 as wake source gives microamp-class standby between measurements, and the internal 31 kHz oscillator keeps a low-power timebase alive in Sleep. The 10-bit ADC channels sample battery voltage and sensor front ends, while the enhanced USART streams readings to a PC or datalogger. The Fail-Safe Clock Monitor guards measurement timing against crystal failure during field deployment, and the 256-byte EEPROM logs calibration and configuration data across power cycles without external memory.
Recomendado
Serial Communication Nodes and Data Loggers
The PIC18F4520-I/P builds cost-effective RS-232 and RS-485 nodes using its enhanced USART with addressable-mode support and auto-baud-detect features documented in the Microchip datasheet. RC6/TX and RC7/RX connect directly to transceivers for multi-drop industrial links, while RC3/SCK, RC4/SDI and RC5/SDO provide an SPI/I2C port for RTC, EEPROM and display peripherals on the same 36-I/O budget. A typical logger uses the 16-bit Timer1 in asynchronous counter mode for timekeeping, samples the 10-bit ADC on a timed interrupt, and buffers records to external SPI flash, uploading over the USART. The 1,536-byte RAM handles moderate ring buffers, and the ECCP/CCP modules can timestamp events with microsecond resolution at 10 MIPS operation.
Recomendado
Resumo dos produtos recomendados
Dados de referência de engenharia para PIC18F4520-I/P — comparação, orientação de projeto e informações de conformidade.
Guia de seleção
Comparação com alternativas
| Parâmetro | Este produto | PIC18F4525-I/P | PIC18F4520-E/P | PIC18LF4520-I/P | PIC18F452-I/P |
|---|---|---|---|---|---|
| Package | 40-PDIP | 40-PDIP - same | 40-PDIP - same | 40-PDIP - same | 40-PDIP - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Flash Memory | 32 KB (16K x 16) | 48 KB (24K x 16) | 32 KB (16K x 16) | 32 KB (16K x 16) | 32 KB (16K x 16) |
| SRAM | 1.536 KB | 3.968 KB | 1.536 KB | 1.536 KB | 1.536 KB |
| Supply Voltage | 4.2 V to 5.5 V | 4.2 V to 5.5 V | 4.2 V to 5.5 V | Lower voltage range (LF grade) | 4.2 V to 5.5 V |
| Max Clock / Performance | 40 MHz / 10 MIPS | 40 MHz / 10 MIPS | 40 MHz / 10 MIPS | 40 MHz / 10 MIPS | 40 MHz class |
| Operating Temperature | -40C to +85C | -40C to +85C | -40C to +125C | -40C to +85C | -40C to +85C |
| nanoWatt Modes / Internal Oscillator / ECCP | Yes / Yes (31 kHz-8 MHz + PLL) / Yes | Yes / Yes / Yes | Yes / Yes / Yes | Yes / Yes / Yes | No / No / Standard CCP only |
Principais diferenciais
- nanoWatt power management with Fail-Safe Clock Monitor (vs PIC18F452-I/P)
- Extended temperature drop-in for harsh environments (vs PIC18F4520-E/P)
- Memory headroom without footprint change (vs PIC18F4525-I/P)
Notas de projeto
Decouple both VDD pins (11 and 32) with 100 nF ceramic capacitors placed within a few millimeters of each pin, plus one bulk 4.7 uF-10 uF capacitor per board. The 4.2V-5.5V floor matters: with a 5V rail and diode-protected brown-out enabled, verify the reset threshold stays above the minimum operating voltage. Estimated: at 10 MIPS with typical 25 mA active current, a 5V supply dissipates 125 mA-mW per 5V-hour; ensure any linear pre-regulator handles the MCU plus peripheral load with margin.
For ICSP, route RB6/PGC and RB7/PGD to a standard 5-pin header (MCLR, VDD, VSS, PGD, PGC) and add a series resistor (1k-10k) on MCLR so the programmer can overdrive VPP without fighting external reset circuitry. Keep oscillator traces for OSC1/OSC2 (pins 13-14) short with guard ground, and place crystal load capacitors close to the pins. Analog inputs on RA0-RA5 benefit from a local ground island under the ADC reference traces when using external VREF+ on RA3.
Configuration bits are the top failure source when migrating from PIC18F452: the PIC18F4520 adds FCMEN (Fail-Safe Clock Monitor) and IESO, and its FOSC bit encoding differs, so a wrongly set config word can leave the chip silent or clocked from the internal RC. Also note RA4 is open-drain only - it needs an external pull-up to drive logic high. Per Microchip migration document 39647a, verify ADC clock selection and the new ECCP dead-time registers when porting firmware. Do not leave LVP (RB5/PGM) enabled in production unless low-voltage programming is intended, as floating RB5 can trigger spurious entry.
Informações de conformidade
Current production PIC18F4520-I/P is RoHS-compliant and lead-free per Microchip product status. REACH and halogen-free status not stated in provided data; verify via distributor compliance certificates.
