PIC18LF4680-I/ML - 8-Bit 40MHz MCU 64KB Flash ECAN 44-QFN | Microchip
N.º da peça: PIC18LF4680-I/ML ✓ Ativo| Qtd. | Preço unitário | Total |
|---|---|---|
| 1 | $6.78 | $6,78 |
| 10 | $6.1 | $61,00 |
| 100 | $5.34 | $534,00 |
| 500 | $4.62 | $2.310,00 |
| 1.000 | $4.05 | $4.050,00 |
PIC18LF4680-I/ML Visão geral
Key features include 64 KB (32K x 16) of self-programmable Flash, 3328 bytes of RAM, 1024 bytes of EEPROM, 11 channels of 10-bit ADC, and 36 digital I/O pins. The LF variant uses an advanced CMOS process with nanoWatt technology, providing low sleep current and idle current optimizations suited for battery-powered industrial and automotive subsystems.
The PIC18F4680 family architecture pairs a 16-bit modified Harvard core with a wide peripheral set: two Enhanced USART modules, MSSP for SPI/I2C, two Capture/Compare/PWM modules, an Enhanced CAN 2.0B controller with hardware filtering, and a 10-bit 11-channel ADC. The ECAN controller implements CAN 2.0A/B with DeviceNet and CANopen filtering capability, removing the need for an external CAN transceiver controller in many node designs.
Typical applications include industrial CAN nodes (sensor hubs, motor controllers), automotive body and chassis ECUs, building automation (BACnet or CAN-based HVAC), and medical instrumentation with battery-backed operation. The wide VDD range (2.0 V to 5.5 V) allows direct connection to 3.3 V or 5 V rails and 2-cell Li-ion battery stacks.
Designers should pair this MCU with a 3.3 V CAN transceiver such as the MCP2551 or MCP2561 and a precision LDO such as the MCP1700 for the analog supply. A 20 MHz or 40 MHz crystal or resonator is required for CAN-bus synchronization; ECAN bit-timing relies on Fosc accuracy.
For firmware development, MPLAB X IDE, XC8 compiler, and MPLAB Code Configurator support code generation for ECAN, ADC, and PWM peripherals. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
Alternativas drop-in para PIC18LF4680-I/ML — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.
Variantes desta série
Modelos da mesma série compatíveis como drop-in com PIC18LF4680-I/ML (mesmo formato e footprint) — diferindo em Package, Operating Temperature, Timers, ADC, Program Memory (Flash).
Ferramenta de comparação rápida — selecione peças alternativas para comparação lado a lado:
PIC18F4680-I/ML
✅ Drop-In✓ Em estoque
$9.84 / unidade
Ver ficha técnica →PIC18LF4685-I/ML
✅ Drop-In✓ Em estoque
$5.63 / unidade
Ver ficha técnica →PIC18LF4480-I/ML
✅ Drop-In✓ Em estoque
$4.78 / unidade
Ver ficha técnica →PIC18LF4580-I/PT
✅ Drop-In✓ Em estoque
$5.65 / unidade
Ver ficha técnica →PIC18LF46K80-I/ML
✅ Drop-In✓ Em estoque
$4.31 / unidade
Ver ficha técnica →PIC18LF4680-I/ML Classificações máximas e características elétricas
| Core Architecture | PIC18 (8-bit, modified Harvard) |
| Program Memory (Flash) | 64 KB (32K x 16) |
| RAM | 3328 bytes |
| EEPROM | 1024 bytes |
| Maximum CPU Speed | 40 MHz |
| Supply Voltage (VDD) | 2.0 V to 5.5 V |
| I/O Pins | 36 |
| ADC | 11-channel, 10-bit |
| Enhanced CAN (ECAN) | CAN 2.0A/B, hardware filtering |
| UART | 2x Enhanced USART |
| SPI / I2C | 1x MSSP (SPI / I2C) |
| CCP / ECCP | 2 CCP / 1 ECCP |
| Timers | 1x 8-bit, 3x 16-bit |
| Encapsulamento | 44-pin QFN (8x8 mm), ML suffix |
| Temperatura de operação | -40 C to +85 C (Industrial, I) |
| Tipo de montagem | Surface Mount |
| Status RoHS | Compliant |
Configuração de pinos do PIC18LF4680-I/ML
| Pino 1 | RA0/AN0 — Digital I/O / Analog input channel 0 |
| Pino 2 | RA1/AN1 — Digital I/O / Analog input channel 1 |
| Pino 3 | RA2/AN2/VREF- — Digital I/O / Analog input 2 / ADC VREF- |
| Pino 4 | RA3/AN3/VREF+ — Digital I/O / Analog input 3 / ADC VREF+ |
| Pino 5 | RA4/T0CKI — Digital I/O / Timer0 clock input |
| Pino 6 | RA5/AN4 — Digital I/O / Analog input 4 |
| Pino 7 | RA6 — Digital I/O |
| Pino 8 | RA7 — Digital I/O |
| Pino 9 | RE0/RD — Digital I/O / Parallel port read control |
| Pino 10 | RE1/WR — Digital I/O / Parallel port write control |
| Pino 11 | RE2/CS — Digital I/O / Parallel port chip select |
| Pino 12 | OSC1/CLKI/RA7 — Crystal input / external clock input |
| Pino 13 | OSC2/CLKO/RA6 — Crystal output / clock output |
| Pino 14 | RC0/T1OSO/T1CKI — Digital I/O / Timer1 oscillator output |
| Pino 15 | RC1/T1OSI — Digital I/O / Timer1 oscillator input |
| Pino 16 | RC2/CCP1 — Digital I/O / Capture/Compare/PWM 1 |
| Pino 17 | RC3/SCK/SCL — Digital I/O / SPI clock / I2C clock |
| Pino 18 | RC4/SDI/SDA — Digital I/O / SPI data in / I2C data |
| Pino 19 | RC5/SDO — Digital I/O / SPI data out |
| Pino 20 | RC6/TX/CK — Digital I/O / USART1 TX / clock |
| Pino 21 | RC7/RX/DT — Digital I/O / USART1 RX / data |
| Pino 22 | RD0/PSP0 — Digital I/O / Parallel slave port bit 0 |
| Pino 23 | RD1/PSP1 — Digital I/O / Parallel slave port bit 1 |
| Pino 24 | RD2/PSP2 — Digital I/O / Parallel slave port bit 2 |
| Pino 25 | RD3/PSP3 — Digital I/O / Parallel slave port bit 3 |
| Pino 26 | RD4/PSP4 — Digital I/O / Parallel slave port bit 4 |
| Pino 27 | RD5/PSP5 — Digital I/O / Parallel slave port bit 5 |
| Pino 28 | RD6/PSP6 — Digital I/O / Parallel slave port bit 6 |
| Pino 29 | RD7/PSP7 — Digital I/O / Parallel slave port bit 7 |
| Pino 30 | VSS — Ground reference |
| Pino 31 | VDD — Positive supply voltage (2.0-5.5 V) |
| Pino 32 | RB0/INT0 — Digital I/O / External interrupt 0 |
| Pino 33 | RB1/INT1 — Digital I/O / External interrupt 1 |
| Pino 34 | RB2/INT2 — Digital I/O / External interrupt 2 |
| Pino 35 | RB3/CANTX — Digital I/O / ECAN transmit output |
| Pino 36 | RB4/CANRX — Digital I/O / ECAN receive input |
| Pino 37 | RB5 — Digital I/O |
| Pino 38 | RB6/PGC — Digital I/O / ICSP clock (programming/debug) |
| Pino 39 | RB7/PGD — Digital I/O / ICSP data (programming/debug) |
| Pino 40 | MCLR/VPP — Master clear reset / programming voltage |
| Pino 41 | RF0 — Digital I/O |
| Pino 42 | RF1 — Digital I/O |
| Pino 43 | RF2 — Digital I/O |
| Pino 44 | RF3 — Digital I/O / default NC tie-off on this die |
Aplicações típicas
PIC18LF4680-I/ML é adequado para 6 aplicaçãos: Industrial CAN Node / Sensor Hub, Automotive Body and Chassis ECU, Building Automation / HVAC Controller, Portable Medical Instrumentation, CAN-Enabled Motor Control (BLDC / Stepper), Battery-Backed Sensor Logger with CAN Uplink.
Industrial CAN Node / Sensor Hub
The PIC18LF4680-I/ML suits industrial CAN nodes because its ECAN 2.0B module with 6 hardware acceptance filters handles CANopen or deviceNet traffic without CPU intervention, freeing the 10 MIPS core for sensor processing. The 11-channel 10-bit ADC interfaces directly to analog sensors (temperature, pressure, flow), while the 64 KB Flash stores protocol stacks plus application code. Wide 2.0-5.5 V VDD allows direct connection to 24 V industrial rails via a simple buck regulator, ideal for PLC remote I/O and BACnet HVAC nodes.
Recomendado
Automotive Body and Chassis ECU
The PIC18LF4680-I/ML fits body and chassis ECUs (window lift, mirror control, lighting modules) thanks to its industrial -40 C to +85 C operating range and integrated ECAN module that talks directly to a vehicle CAN bus. Two Enhanced USARTs enable LIN master/slave for door modules, while the ECCP module drives PWM motor control at 20 kHz without CPU load. The 64 KB Flash and 3328 B RAM handle CANopen, J1939, or OBD-II diagnostic libraries alongside application logic.
Recomendado
Building Automation / HVAC Controller
The PIC18LF4680-I/ML powers BACnet or CAN-based HVAC controllers because the ECAN module plus 64 KB Flash holds a full BACnet MS/TP or CANopen stack, while the 11 ADC channels read temperature, humidity, and pressure sensors simultaneously. The 2.0-5.5 V range allows 24 VAC wall-powered operation after rectification, and nanoWatt sleep current under 1 uA enables battery-backed thermostat designs. Two Enhanced USARTs bridge to legacy Modbus RTU or RS-485 networks.
Recomendado
Portable Medical Instrumentation
The PIC18LF4680-I/ML fits portable medical devices (glucose meters, infusion monitors, pulse oximeters) due to its 2.0 V minimum VDD that runs from 2x AA cells, plus 3328 B RAM and 64 KB Flash for FDA-compliant firmware. The 10-bit ADC samples photodiode or electrochemical sensor outputs, while ECCP generates precision PWM for motor or buzzer control. NanoWatt sleep modes drop consumption below 1 uA between measurements, extending battery life in home-care devices.
Recomendado
CAN-Enabled Motor Control (BLDC / Stepper)
The PIC18LF4680-I/ML drives small BLDC or stepper motors because its 2 CCP / 1 ECCP modules generate complementary 3-phase PWM at 20 kHz with dead-band control for FET half-bridges. ECAN allows the motor drive to receive torque commands over CANopen DS402, eliminating analog control wiring. The 64 KB Flash stores vector-control or trapezoidal commutation algorithms; the 11-channel ADC reads back-phase shunt resistors for current sensing.
Recomendado
Battery-Backed Sensor Logger with CAN Uplink
The PIC18LF4680-I/ML enables remote sensor loggers (vibration, temperature, flow) that buffer measurements in 3328 B RAM and 1024 B EEPROM, then upload over CAN when a service truck plugs in. nanoWatt sleep current below 1 uA enables multi-year operation from a single 3.6 V Li-SOCl2 cell, while the ECAN wake-up feature brings the MCU out of sleep on bus activity. The 64 KB Flash holds fault-logging and IEC 61850-style timestamp libraries.
Recomendado
Resumo dos produtos recomendados
Dados de referência de engenharia para PIC18LF4680-I/ML — comparação, orientação de projeto e informações de conformidade.
Guia de seleção
Comparação com alternativas
| Parâmetro | Este produto | PIC18F4680-I/ML | PIC18LF4685-I/ML | PIC18LF4480-I/ML | PIC18LF4580-I/PT | PIC18LF46K80-I/ML |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 44-QFN (8x8 mm, ML) | 44-QFN (8x8 mm, ML) - same | 44-QFN (8x8 mm, ML) - same | 44-QFN (8x8 mm, ML) - same | 44-QFN (8x8 mm, ML) - same | 44-QFN (8x8 mm, ML) - same |
| Flash Memory | 64 KB | 64 KB | 96 KB | 16 KB | 32 KB | 64 KB |
| RAM | 3328 bytes | 3328 bytes | 3328 bytes | 768 bytes | 1536 bytes | 3648 bytes |
| Maximum CPU Speed | 40 MHz | 40 MHz | 40 MHz | 40 MHz | 40 MHz | 64 MHz |
| Supply Voltage | 2.0 V to 5.5 V | 4.2 V to 5.5 V | 2.0 V to 5.5 V | 2.0 V to 5.5 V | 2.0 V to 5.5 V | 1.8 V to 5.5 V |
| CAN Module | ECAN 2.0B | ECAN 2.0B | ECAN 2.0B | ECAN 2.0B | Legacy CAN 1.0 | ECAN 2.0B |
| ADC Channels | 11 x 10-bit | 11 x 10-bit | 11 x 10-bit | 11 x 10-bit | 8 x 10-bit | 11 x 12-bit |
Principais diferenciais
- ECAN 2.0B with hardware acceptance filters in legacy PIC18 architecture (vs PIC18LF4580-I/PT)
- Wide 2.0-5.5 V VDD range with nanoWatt power management (vs PIC18F4680-I/ML)
- 11-channel 10-bit ADC with hardware averaging (vs PIC18LF4580-I/PT)
Notas de projeto
Estimated: with VDD=5.0 V, IO load=20 mA per pin (max), and 36 I/O pins all switching at 10 MHz, dynamic current can approach 50 mA. Use a 100 nF ceramic bypass cap directly on VDD/VSS pins plus a 10 uF bulk cap on the supply rail. For battery designs, place a 1 uF cap on VDD during sleep to maintain POR behavior. The LF variant's nanoWatt sleep drops Iq below 1 uA when properly configured (see DS39625F section on Sleep mode).
The 44-QFN (8x8 mm) package has a center exposed pad that MUST be soldered to a ground plane of at least 0.5 square inches for thermal and electrical performance. Per Microchip QFN layout guidelines, use a 0.4 mm via array (8-12 vias) connecting the thermal pad to inner GND planes. Place the 20 MHz or 40 MHz crystal within 5 mm of OSC1/OSC2 (pins 12-13) and guard the traces with a GND ring to reduce EMI coupling into the ECAN bus.
Route CANTX (pin 35) and CANRX (pin 36) as a matched differential pair to the MCP2551/MCP2561 transceiver, keeping the trace length under 25 mm. Place the transceiver within 10 mm of the MCU to minimize stub reflections. Use a 120 ohm termination resistor at each end of the CAN bus; do not place it at the MCU. Keep CAN traces away from switching power FETs and crystal traces to avoid radiated EMI coupling.
Estimated: ECAN bit-timing at 1 Mbit/s requires Fosc accuracy of +/-0.5% or better; a generic 20 MHz crystal with +/-50 ppm tolerance is acceptable but verify the CAN baud rate prescaler calculation. The LF variant operates to 2.0 V VDD, but ECAN requires at least 3.0 V for bus arbitration - the CAN module will refuse to transmit below 3.0 V. Always tie MCLR (pin 40) to VDD through a 10 kohm resistor and add a 100 nF cap to ground to prevent spurious resets.
Informações de conformidade
RoHS and REACH compliant per Microchip product page. Standard variant is NOT AEC-Q100 qualified - choose PIC18F4680-I/ML automotive version or PIC18LF46K80-I/ML for AEC-Q100 designs. Industrial temperature range -40 C to +85 C.
