PIC18LF4685T-I/ML - 96KB Flash 40MHz 8-bit MCU | Microchip
N.º da peça: PIC18LF4685T-I/ML ✓ Ativo| Qtd. | Preço unitário | Total |
|---|---|---|
| 1 | $9.42 | $9,42 |
| 10 | $8.71 | $87,10 |
| 100 | $7.93 | $793,00 |
| 500 | $7.18 | $3.590,00 |
| 1.000 | $6.62 | $6.620,00 |
PIC18LF4685T-I/ML Visão geral
An 8-bit microcontroller (MCU) is a single-chip computer built around an 8-bit data path, optimized for deterministic real-time control in embedded systems. Within the broader semiconductor hierarchy, the PIC18F family sits between 16-bit PIC24/dsPIC devices and lower-pin-count PIC16 parts, targeting mid-range CAN-enabled and motor-control designs. The PIC18LF4685T-I/ML belongs to the power-managed LF sub-family, which adds nanoWatt technology for sleep currents under 100 nA typical, making it suitable for battery-powered industrial nodes.
Key features include the ECAN module (Enhanced Controller Area Network) for automotive and industrial CAN 2.0B communications, a 10-bit ADC with up to 13 input channels and 100 Ksps conversion rate, three CCP/ECCP modules for PWM generation (ideal for motor and power-converter control), and the standard PIC18 peripheral set of USART, MSSP (SPI/I2C), and parallel slave port. The 96 KB Flash program memory (48K x 16 words) supports self-programming under bootloader control, and the 1 KB internal EEPROM enables data logging without external memory.
The architecture is an enhanced PIC18 Harvard RISC core with a hardware multiplier (8x8 in one cycle), a 31-level hardware stack, and vectored interrupts. Two prioritized interrupt controllers and peripheral pin select (PPS) simplify mixed-signal PCB routing. The instruction set is fully backward-compatible with the PIC16 family, allowing legacy code migration.
Typical applications include automotive body and chassis ECUs requiring CAN bus connectivity, industrial control nodes on 12-24 V bus systems, BLDC and stepper motor control with three-phase PWM, and smart sensor nodes with on-board EEPROM parameter storage. Designers value the LF variant's 2.0 V minimum Vdd for two-AA-cell powered systems.
When designing with this part, allocate the exposed thermal pad (EP) to a continuous ground pour to meet the package's thermal resistance of approximately 22 C/W. Use Microchip's MPLAB X IDE and the PICkit 5 or ICD 4 for in-circuit debug; production programming is supported by MPLAB PM3 or the PICkit 5 standalone mode.
This page synthesizes distributor pricing, pin-compatible drop-in alternatives from the PIC18 family, and practical design notes not collected in any single manufacturer datasheet, helping engineers select and source this MCU quickly.
Alternativas drop-in para PIC18LF4685T-I/ML — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.
Variantes desta série
Modelos da mesma série compatíveis como drop-in com PIC18LF4685T-I/ML (mesmo formato e footprint) — diferindo em Package, Program Memory (Flash), Operating Temperature, Timers, Mounting Type.
Ferramenta de comparação rápida — selecione peças alternativas para comparação lado a lado:
PIC18LF4685-I/ML
✅ Drop-In✓ Em estoque
$5.63 / unidade
Ver ficha técnica →PIC18F4685T-I/ML
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
PIC18LF4585-I/ML
✅ Drop-In✓ Em estoque
$5.42 / unidade
Ver ficha técnica →PIC18F46J50-I/ML
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
PIC18LF4480T-I/ML
✅ Drop-In ⚠️ Especificações não verificadas✓ Em estoque
$4.72 / unidade
Ver ficha técnica →PIC18LF4685T-I/ML Classificações máximas e características elétricas
| Core Architecture | PIC18 (8-bit RISC, Harvard) |
| Program Memory (Flash) | 96 KB (48K x 16 words) |
| Data SRAM | 3 KB |
| Data EEPROM | 1 KB |
| Maximum CPU Frequency | 40 MHz |
| Operating Voltage Range | 2.0 V to 5.5 V (LF variant) |
| I/O Pins | 36 |
| ADC | 10-bit, up to 13 channels, 100 Ksps |
| CAN Module | ECAN (Enhanced CAN 2.0B) |
| PWM / CCP Modules | 3 (2 CCP + 1 ECCP) |
| UART | 1x USART (EUSART) |
| SPI / I2C | 1x MSSP (SPI / I2C) |
| Timers | 4 (Timer0/1/2/3) |
| Encapsulamento | 44-pin QFN (8x8 mm) with Exposed Pad |
| Temperatura de operação | -40 C to +85 C (Industrial) |
| Tipo de montagem | Surface Mount (Tape & Reel) |
| Nível MSL | 3 (168 hours) |
| Status RoHS | Compliant |
| Instruction Set | PIC18C / PIC16C compatible |
Configuração de pinos do PIC18LF4685T-I/ML
| Pino 1 | RX/DT — EUSART receive / data |
| Pino 2 | TX/CK — EUSART transmit / clock |
| Pino 3 | RC0/T1OSO/T1CKI — I/O port C bit 0 / Timer1 oscillator output |
| Pino 4 | RC1/T1OSI/CCP2 — I/O port C bit 1 / Timer1 oscillator input / CCP2 |
| Pino 5 | RC2/CCP1 — I/O port C bit 2 / CCP1 PWM output |
| Pino 6 | RC3/SCK/SCL — I/O port C bit 3 / MSSP SPI clock / I2C clock |
| Pino 7 | RC4/SDI/SDA — I/O port C bit 4 / MSSP SPI data in / I2C data |
| Pino 8 | RC5/SDO — I/O port C bit 5 / MSSP SPI data out |
| Pino 9 | RC6/TX/CK — I/O port C bit 6 / EUSART TX / clock |
| Pino 10 | RC7/RX/DT — I/O port C bit 7 / EUSART RX / data |
| Pino 11 | RD0/PSP0 — I/O port D bit 0 / Parallel Slave Port bit 0 |
| Pino 12 | RD1/PSP1 — I/O port D bit 1 / Parallel Slave Port bit 1 |
| Pino 13 | RD2/PSP2 — I/O port D bit 2 / Parallel Slave Port bit 2 |
| Pino 14 | RD3/PSP3 — I/O port D bit 3 / Parallel Slave Port bit 3 |
| Pino 15 | RD4/PSP4 — I/O port D bit 4 / Parallel Slave Port bit 4 |
| Pino 16 | RD5/PSP5 — I/O port D bit 5 / Parallel Slave Port bit 5 |
| Pino 17 | RD6/PSP6/TX/CK — I/O port D bit 6 / PSP bit 6 / EUSART TX alt |
| Pino 18 | RD7/PSP7/RX/DT — I/O port D bit 7 / PSP bit 7 / EUSART RX alt |
| Pino 19 | VSS — Ground reference |
| Pino 20 | VDD — Positive supply (2.0-5.5 V for LF variant) |
| Pino 21 | RB0/INT0/FLT0 — I/O port B bit 0 / External interrupt 0 / ECCP fault |
| Pino 22 | RB1/INT1 — I/O port B bit 1 / External interrupt 1 |
| Pino 23 | RB2/INT2/CANTX — I/O port B bit 2 / INT2 / ECAN transmit |
| Pino 24 | RB3/INT3/CANRX — I/O port B bit 3 / INT3 / ECAN receive |
| Pino 25 | RB4/KBI0 — I/O port B bit 4 / Keyboard interrupt 0 |
| Pino 26 | RB5/KBI1 — I/O port B bit 5 / Keyboard interrupt 1 |
| Pino 27 | RB6/KBI2/PGC — I/O port B bit 6 / KBI / ICSP clock |
| Pino 28 | RB7/KBI3/PGD — I/O port B bit 7 / KBI / ICSP data |
| Pino 29 | RE0/RD/AN5 — I/O port E bit 0 / Read strobe / ADC AN5 |
| Pino 30 | RE1/WR/AN6 — I/O port E bit 1 / Write strobe / ADC AN6 |
| Pino 31 | RE2/CS/AN7 — I/O port E bit 2 / Chip select / ADC AN7 |
| Pino 32 | VDD — Positive supply (second Vdd pin for noise immunity) |
| Pino 33 | VSS — Ground reference (second Vss pin) |
| Pino 34 | RA0/AN0 — I/O port A bit 0 / ADC AN0 |
| Pino 35 | RA1/AN1 — I/O port A bit 1 / ADC AN1 |
| Pino 36 | RA2/AN2/VREF- — I/O port A bit 2 / ADC AN2 / ADC VREF- |
| Pino 37 | RA3/AN3/VREF+ — I/O port A bit 3 / ADC AN3 / ADC VREF+ |
| Pino 38 | RA4/T0CKI — I/O port A bit 4 / Timer0 clock input |
| Pino 39 | RA5/AN4/SS — I/O port A bit 5 / ADC AN4 / MSSP slave select |
| Pino 40 | RA6/OSC2/CLKO — I/O port A bit 6 / Crystal output / clock out |
| Pino 41 | RA7/OSC1/CLKI — I/O port A bit 7 / Crystal input / clock in |
| Pino 42 | VSS — Ground reference |
| Pino 43 | VDD — Positive supply |
| Pino 44 | NC — Not connected (per datasheet pinout) |
| Pino EP | EP — Exposed thermal pad - tie to ground for heat dissipation |
Aplicações típicas
PIC18LF4685T-I/ML é adequado para 6 aplicaçãos: Automotive CAN Body / Chassis ECUs, Industrial CANopen / DeviceNet Nodes, BLDC and Stepper Motor Control, Smart Sensor Nodes with EEPROM Parameter Storage, Battery-Backed Industrial Controllers, USB-to-CAN Gateway Bridges.
Automotive CAN Body / Chassis ECUs
The PIC18LF4685T-I/ML is well-suited for automotive body and chassis electronic control units thanks to its on-chip ECAN 2.0B module supporting both standard and extended identifiers at 1 Mbps. Its 96 KB Flash accommodates J1939 / CANopen stacks plus diagnostic routines, while 1 KB EEPROM stores fault codes and learned trim values non-volatilely. The LF variant's 2.0 V minimum Vdd supports battery-direct operation during cranking transients down to 6 V nominal. Place a 100 nF decoupling cap on each Vdd/Vss pair and connect the EP pad to a continuous ground pour. The device's -40 C to +85 C industrial range covers cabin and under-hood body modules.
Recomendado
Industrial CANopen / DeviceNet Nodes
The PIC18LF4685T-I/ML hosts CANopen and DeviceNet slave nodes on industrial 24 V bus systems, where its 5 V tolerance on digital I/O simplifies interfacing to 24 V signal conditioning. The 3 KB SRAM is sufficient for CANopen object dictionaries in small slaves, and the 96 KB Flash hosts the full CANopen stack plus application logic. ECAN's six hardware acceptance filters offload message filtering from the CPU, leaving headroom for closed-loop control tasks. Use MSSP in SPI mode to drive an external ADC or DAC for analog I/O expansion; the parallel slave port remains available for host-controller backplanes.
Recomendado
BLDC and Stepper Motor Control
The PIC18LF4685T-I/ML drives three-phase brushless DC motors via its three CCP/ECCP modules generating complementary PWM with programmable dead-band insertion. The 40 MHz core and 10-bit ADC with 100 Ksps conversion rate support field-oriented control loops at typical 20 kHz switching frequency. Internal ECCP auto-shutdown protects the inverter on overcurrent events. Use the QEI (Quadrature Encoder Interface) on Timer0/Timer1 for closed-loop position sensing. The exposed-pad QFN package dissipates the moderate MCU heat at moderate PWM duty cycles without an external heatsink when VIN < 4 V.
Recomendado
Smart Sensor Nodes with EEPROM Parameter Storage
The PIC18LF4685T-I/ML functions as a smart sensor front-end combining analog acquisition, digital filtering, and CAN reporting with non-volatile calibration storage in its 1 KB on-chip EEPROM. Its 10-bit ADC with 13 input channels multiplexes thermocouple, RTD, strain-gauge, or 4-20 mA transducer interfaces. nanoWatt sleep modes at sub-100 nA extend battery life in wireless sensor nodes powered by two AA cells, with periodic CAN wake-up. The 3 KB SRAM buffers sensor logs before scheduled CAN transmission, and the 96 KB Flash stores linearization tables plus the CAN protocol stack.
Recomendado
Battery-Backed Industrial Controllers
The PIC18LF4685T-I/ML's LF (2.0-5.5 V) operating range uniquely suits battery-backed industrial controllers where a coin cell or supercapacitor retains RTC and parameter memory during main power loss. nanoWatt Sleep with RTCC keeps time at under 100 nA typical, and the 1 KB EEPROM logs event timestamps before power dies. The ECAN module wakes the controller on bus activity for OSEK / AUTOSAR-style network management. Industrial -40 C to +85 C operation spans outdoor enclosures and factory-floor installations, and the 44-QFN exposed pad provides a robust mechanical anchor for vibration-prone environments.
Recomendado
USB-to-CAN Gateway Bridges
Although the PIC18LF4685T-I/ML itself lacks USB, designers pair it with an external MCP2200 or MCP2210 USB bridge to create a low-cost USB-to-CAN gateway for PC-based diagnostic tools. The MCU's 40 MHz MIPS throughput and 96 KB Flash handle bidirectional CAN-to-UART/USB bridging at 1 Mbps bus rates without dropping frames. MSSP in SPI mode talks to the USB bridge chip while the ECAN module handles bus arbitration. The 44-QFN footprint keeps the gateway PCB under 30 mm x 30 mm. End users include automotive scan-tools, industrial service laptops, and CANopen configuration software.
Recomendado
Resumo dos produtos recomendados
Dados de referência de engenharia para PIC18LF4685T-I/ML — comparação, orientação de projeto e informações de conformidade.
Guia de seleção
Comparação com alternativas
| Parâmetro | Este produto | PIC18LF4685-I/ML | PIC18F4685T-I/ML | PIC18LF4585-I/ML | PIC18F46J50-I/ML |
|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 44-QFN (8x8 mm) Exposed Pad | 44-QFN (8x8 mm) Exposed Pad - identical | 44-QFN (8x8 mm) Exposed Pad - identical | 44-QFN (8x8 mm) Exposed Pad - identical | 44-QFN (8x8 mm) Exposed Pad - identical |
| Program Flash | 96 KB (48K x 16) | 96 KB (48K x 16) | 96 KB (48K x 16) | 48 KB (-50%) | 64 KB (-33%) |
| Data SRAM | 3 KB | 3 KB | 3 KB | 3 KB | 3.8 KB |
| Data EEPROM | 1 KB | 1 KB | 1 KB | 1 KB | 0 (no internal EEPROM) |
| Max CPU Frequency | 40 MHz | 40 MHz | 40 MHz | 40 MHz | 48 MHz (+20%) |
| Operating Voltage | 2.0 V to 5.5 V | 2.0 V to 5.5 V | 4.2 V to 5.5 V (non-LF) | 2.0 V to 5.5 V | 2.0 V to 3.6 V (J-series) |
| CAN Module | ECAN 2.0B | ECAN 2.0B | ECAN 2.0B | None | None |
| USB Module | No | No | No | No | USB 2.0 Full-Speed |
| ADC Channels / Resolution | 13 / 10-bit | 13 / 10-bit | 13 / 10-bit | 11 / 10-bit | 13 / 10-bit |
| Operating Temperature | -40 C to +85 C (Industrial) | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C |
Principais diferenciais
- Industry-leading nanoWatt LF voltage range down to 2.0 V (vs PIC18F4685T-I/ML)
- On-chip ECAN 2.0B module with hardware acceptance filters (vs PIC18LF4585-I/ML)
- Largest Flash in the LF 44-QFN PIC18 family at 96 KB (vs PIC18LF4480T-I/ML)
Notas de projeto
Estimated: at 40 MHz and 5 V supply, the PIC18LF4685T-I/ML draws approximately 25 mA active and 30 uA in Sleep with RTCC. Place a 100 nF ceramic decoupling capacitor on each Vdd/Vss pair (pins 20, 32, 43) within 3 mm of the IC, plus a single 10 uF bulk tantalum near the supply pin. For LF designs running at 2.0-3.3 V, also include a 100 nF cap on the AVdd pin if used; tie unused ADC channels to Vdd or Vss to minimize spurious ADC conversions.
The 44-QFN exposed-pad package has a thermal resistance of approximately 22 C/W (theta_JA on a 4-layer JEDEC test PCB). Solder the exposed pad to a continuous ground pour with at least 16 thermal vias (0.3 mm drill, 0.5 mm pitch) to inner ground planes. At maximum CPU throughput (40 MHz, 5 V, all peripherals active), the device dissipates approximately 125 mW, giving a 3 C temperature rise above ambient - well within the 125 C junction limit. No external heatsink is required for typical embedded use.
Keep traces to the ECAN pins RB2/CANTX and RB3/CANRX shorter than 50 mm to minimize radiated emissions; place the MCP2551 CAN transceiver within 25 mm of these pins and route the CANH/CANL differential pair as a 100 ohm impedance-matched pair with ground reference. For the MSSP SPI bus, add 10 kohm pull-ups on SCL/SDA when using I2C mode. Keep the crystal oscillator traces (RA6/OSC2, RA7/OSC1) within 10 mm of the IC and guard them with a ground ring to reduce EMI susceptibility.
Do not program the configuration bits to disable the MCLR pin without an external pull-up, or the ICSP interface will be unreachable. When migrating from the PIC18F4685 (non-LF) to the LF variant, verify that low-voltage brown-out detection is configured for 2.0 V minimum operation. The 'T' suffix denotes Tape-and-Reel packaging; if you design for tray loading during prototyping, order PIC18LF4685-I/ML (no 'T') instead. Avoid leaving unused I/O pins floating - configure them as outputs driving low to minimize ICC leakage.
Informações de conformidade
RoHS and REACH compliant per Microchip product page. Not AEC-Q100 qualified; for automotive designs requiring AEC-Q100, consider the PIC18F4685-I/ML automotive-grade variant or a Q100-rated dsPIC. Halogen-free status not stated in the public Microchip datasheet - confirmed compliant only on request.