Интегральные схемы

A54SX32-CQ256M

A54SX32-CQ256M - 32K Gate SX FPGA 205MHz CQFP-256 | Microsemi

The Microsemi (now Microchip Technology) A54SX32-CQ256M is a 32,000-gate antifuse FPGA from the SX family, offering 1,800 logic cells (2,880 logic modules reported by some sources), up to 203 user I/O pins, and a maximum clock frequency of 205 MHz, housed in a 256-pin CQFP (Ceramic Quad Flat Package, 75x75 mm) with exposed pad and tie bar. It operates from dual supply rails of 3.0V to 3.6V and 4.75V to 5.25V. An antifuse FPGA is a type of field-programmable gate array in which the interconnect configuration is permanently set at power-up programming by blowing microscopic antifuse elements. Unlike SRAM-based FPGAs from Xilinx or Altera, antifuse devices are non-volatile, radiation-tolerant by nature of their architecture, and immune to configuration bitstream interception, making them a member of the broader programmable logic family that also includes CPLDs and flash-based FPGAs. Key features of the A54SX32-CQ256M include the sea-of-modules architecture that delivers ASIC-like routing efficiency, 0.35 um process technology supporting up to 205 MHz system performance, dual-rail power operation (3.3V core/I-O and 5.0V tolerant supply range) for mixed-voltage systems, and a ceramic package suited to high-reliability and extended-temperature environments. Technically, the SX family uses a patented sea-of-modules fabric built from combinational and sequential logic modules, giving deterministic, short interconnect delays that distinguish it from SRAM FPGA architectures. Design entry and implementation are performed with Actel/Microsemi Libero SoC (Designer) tooling, and the design is one-time-programmable, which removes the need for an external configuration PROM and reduces board-level BOM cost. Typical applications include aerospace and defense signal processing, industrial control, communications infrastructure glue logic, and bridge/interface functions where 5V compatibility and non-volatile one-time programming are required. The 203 user I/O capacity supports wide parallel bus interfacing in legacy backplane systems. A key design consideration is that antifuse devices cannot be reprogrammed: verify the design fully in simulation before programming production units, and note that the CQFP package requires careful socket or solder handling due to its lead-frame construction. This page synthesizes distributor pricing context, drop-in alternatives, pinout guidance, and practical design notes not found in the manufacturer datasheet.

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A54SX32-PQ208

A54SX32-PQ208 - SX FPGA, 48K Gates, 174 I/O | Microchip

The Microchip Technology A54SX32-PQ208 (originally Actel, then Microsemi) is a high-performance SX-family antifuse FPGA delivering 48,000 gates with 2880 logic modules (CLBs), 174 user I/O pins, and internal performance up to 280-320 MHz, housed in a 208-pin 28 mm x 28 mm Plastic Quad Flat Package (PQFP) for surface mounting. An FPGA (Field-Programmable Gate Array) is a semiconductor device containing a fabric of configurable logic blocks and programmable interconnects that the designer wires together after manufacturing. Unlike SRAM FPGAs, the SX family uses antifuse programming technology, which is one-time programmable: the configuration becomes a permanent, non-volatile connection at power-up with no external configuration device, no configuration time, and inherently high resistance to design theft and SEU-induced reconfiguration issues. Key features of the A54SX32-PQ208 include a sea-of-modules architecture for high logic utilization with 100% pin locking, 3.0V to 3.6V core operation (nominal 3.3V) with 5.0V-tolerant capability via dual-rail support of 4.75V to 5.25V, and timing performance of 320 MHz internal toggle with 3.7 ns pin-to-pin clock-to-out, 0.1 ns input set-up, and 0.25 ns clock skew. These characteristics support 66 MHz PCI single-chip integration. The sea-of-modules floorplan covers the entire die with a grid of logic modules built around C-cells and S-cells, enabling predictable routing and full-resource utilization. The antifuse fabric yields low static power consumption compared to SRAM FPGAs of similar capacity. Typical applications include glueless 66 MHz PCI designs, industrial control, communications line cards, military/aerospace subsystems requiring non-volatile, instant-on programmable logic, and as a drop-in capacity upgrade path within the SX family. Design consideration: because the device is one-time programmable, verify the full design via simulation before programming the antifuses; there is no in-system reconfiguration. Budget the dual supply rails (3.3V and optional 5V) in the power tree. This page synthesizes distributor pricing, drop-in same-package alternatives, practical design notes, and verified specifications not consolidated in any single datasheet or distributor listing.

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A54SX32-PQ208I

A54SX32-PQ208I - 48K Gate FPGA 174 I/O PQFP-208 | Microchip

The Microchip Technology (Actel/Microsemi) A54SX32-PQ208I is an antifuse FPGA from the SX family providing 48,000 gates with 1,800 logic cells (modules) and 174 configurable user I/O, housed in a 208-pin 28 mm x 28 mm PQFP (208-BFQFP) package rated for industrial temperature operation. It delivers up to 320 MHz internal performance with 3.7 ns pin-to-pin clock-to-out, 0.1 ns input setup, and 0.25 ns clock skew, operating from dual supply rails of 3.3 V (core) with 5.0 V tolerant I/O. An antifuse FPGA is a one-time-programmable field programmable gate array in which each programmable interconnect point is an amorphous silicon antifuse that permanently forms a low-resistance link during programming. Within the semiconductor hierarchy, the A54SX32-PQ208I sits under FPGA -> field-programmable logic -> programmable SoC/system logic. Unlike SRAM FPGAs, antifuse devices are non-volatile at power-up, highly resistant to configuration corruption, and need no external configuration PROM, which is why the SX family is widely deployed in aerospace, industrial, and long-lifecycle embedded systems. Key differentiating features include the sea-of-modules architecture that enables 100% resource utilization with 100% pin locking, eliminating the routability penalties typical of channel-based FPGA architectures. The device supports 66 MHz PCI designs as a single-chip CPLD/FPGA integration solution, and its 3.3 V operation with 5.0 V tolerant inputs simplifies interfacing to legacy 5 V TTL buses. Technically, the A54SX32 is fabricated in a 0.35 um CMOS process and contains 2,880 LABs/CLBs organized as a sea of C-cells and R-cells. This fine-grained architecture yields deterministic timing: clock skew is held to 0.25 ns and clock-to-out to 3.7 ns across the full 174 I/O, allowing high-frequency state machines and PCI interfaces to close timing without iterative floorplanning. Typical applications include PCI bus interface logic, glueless system integration replacing multiple CPLDs and ASSPs, industrial automation controllers, and defense/industrial systems requiring non-volatile, single-chip programmable logic with long-term availability. Design consideration: the device is one-time programmable, so prototype thoroughly in simulation and verify I/O assignments before programming; there is no in-system reprogramming fallback. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.

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A54SX32-PQ208M

A54SX32-PQ208M - 48K Gate FPGA, 174 I/O, PQFP-208 | Microchip

The Microchip Technology (Microsemi/Actel) A54SX32-PQ208M is a 48,000-gate SX-family antifase CMOS Field Programmable Gate Array (FPGA) with 174 programmable I/O pins, internal performance up to 320 MHz, and a 3.3 V nominal supply (3.0 V to 3.6 V range, 5 V tolerant operation), housed in a 208-pin Ball-less Quad Flat Package (208-BFQFP/PQFP) with a 28 x 28 mm body and 0.5 mm terminal pitch. An FPGA (Field Programmable Gate Array) is a semiconductor device containing programmable logic blocks and interconnects that designers configure in the field, sitting in the semiconductor hierarchy as a programmable logic IC below ASICs but above CPLDs in gate count. The Actel SX family uses a sea-of-modules architecture that simplifies design time, reduces design cost and power consumption, and shortens time to market for performance-intensive applications. Key features of the A54SX32 include 3.7 ns clock-to-out (pin-to-pin), 0.1 ns input setup time, and 0.25 ns clock skew, enabling 66 MHz PCI single-chip integration with 100% resource utilization and 100% pin locking. The 3.3 V core operation with 5.0 V tolerant inputs eases interfacing with legacy 5 V logic in industrial systems. Technically, the device is fabricated on a 0.35 um CMOS process and offers antifuse program-once security, which makes the configuration non-volatile, non-reprogrammable by third parties, and immune to configuration readback attacks - a distinct advantage over SRAM FPGAs where bitstream security matters. Typical applications include industrial control, 66 MHz PCI interface glue logic integration, communications equipment, and military/aerospace subsystems where non-volatile, secure, single-chip FPGA integration is required. Design consideration: verify the exact speed-grade suffix (standard M grade versus P1/PP faster grades) against your timing closure requirements, since the M grade runs 240 MHz maximum versus faster variants. This page synthesizes distributor pricing, same-family drop-in alternatives, and practical design notes not found in the manufacturer datasheet.

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A54SX32-PQG208

A54SX32-PQG208 - 32K-Gate SX FPGA, 208-PQFP | Microchip

The Microchip Technology A54SX32-PQG208 (Actel SX family) is a 32,000-gate antifuse FPGA with 1800 logic modules, up to 240 MHz system performance, and 174 user I/O, housed in a 208-pin Plastic Quad Flat Pack (PQFP) with gull-wing terminals. It operates from a 3.3V/5V supply environment and uses 0.35 um CMOS antifuse technology. An FPGA (Field-Programmable Gate Array) is a semiconductor device containing a fabric of configurable logic blocks and interconnects that the designer programs after manufacturing. The Actel SX family belongs to the one-time-programmable (OTP) antifuse FPGA class, positioned within the broader programmable logic hierarchy alongside SRAM-based and flash-based FPGAs. Unlike SRAM FPGAs, antifuse devices are non-volatile, configuration is stored in the silicon itself, and there is no need for an external configuration flash or boot sequence. Key features include a sea-of-modules architecture that delivers high routing efficiency and predictable timing, 32K system gates of usable density, and 174 user-selectable I/O in the 208-BFQFP package. The antifuse interconnect adds near-zero capacitance, contributing to the family's class-leading speed and low dynamic power consumption. Technically, the SX architecture uses a sea-of-modules fabric built from combinational and sequential logic modules (C-cells and R-cells) interconnected through a metal-to-metal antifuse program layer on a 0.35 um process. Once programmed, connections are permanent, giving high immunity to configuration upsets compared with volatile fabrics, which is why Actel/Microchip antifuse FPGAs historically found use in high-reliability systems. Typical applications include glueless interface and bridge logic, bus translation and protocol conversion, high-speed state machines, and performance-intensive control logic in industrial, communications, and defense-adjacent equipment. A key design consideration: the A54SX32-PQG208 is one-time programmable, so prototype iterations require new devices; plan design freezes and use the manufacturer design tools for simulation before programming. This page synthesizes distributor availability, same-package drop-in family variants, and practical design notes not found in the manufacturer datasheet.

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A54SX32-PQG208I

A54SX32-PQG208I - SX FPGA 48K Gates 174 I/O | Microchip

The Microchip Technology (Microsemi/Actel) A54SX32-PQG208I is a member of the SX family of anti-fuse FPGAs offering 32,000 logic gates (48K system gates), 1800 logic modules, 174 user I/Os, and system performance up to 240 MHz, housed in a 208-pin Plastic Quad Flat Pack (PQG208/BFQFP) with industrial temperature rating of -40C to +85C. It operates from a 3.3V/5V supply on 0.35 um CMOS technology. An FPGA (Field-Programmable Gate Array) is a semiconductor device containing a fabric of configurable logic blocks and interconnects that the designer programs after manufacturing. Within the programmable logic hierarchy, the A54SX32 sits at the device level under FPGA -> programmable logic -> digital logic IC. The SX family uses a sea-of-modules architecture built on a patented antifuse interconnect, which delivers ASIC-like routability and performance with no configuration storage element required. Key features include one-time-programmable antifuse technology that eliminates the need for external boot flash and removes configuration-bitstream security concerns, sub-10 ns deterministic interconnect delays, 174 user-input/output pins on the 208-pin QFP body, and low static power consumption typical of antifuse CMOS fabric. Technically, the device integrates combinational and sequential logic modules (the 1800-cell array) with dedicated clock resources, achieving deterministic, delay-predictable routing that SRAM FPGAs of the era could not match. The antifuse elements add near-zero capacitance to the routing network, which is the primary reason for the 240 MHz toggle capability at 0.35 um geometry. Typical applications include industrial control and automation logic, glueless bus interfacing and bridge logic, telecommunications and data-communication line-card control, and military/avionic systems where instant-on and configuration-security properties of antifuse technology are valued. A key design consideration is that antifuse FPGAs are one-time programmable: any functional change requires a new device, so reserve engineering margin in I/O count and module utilization before committing the design. Use Libero SoC (Designer) toolchain for place-and-route and timing sign-off. This page synthesizes verified distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.

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A54SX32-PQG208M

A54SX32-PQG208M - SX FPGA 32K Gates 208-QFP | Microchip

The Microchip Technology (Actel/Microsemi) A54SX32-PQG208M is an SX-family antifuse FPGA with 32K system gates (2880 CLBs) and 174 user I/Os, housed in a 208-terminal PQFP (208-BFQFP) surface-mount package with a 0.5 mm terminal pitch. An FPGA (Field-Programmable Gate Array) is a semiconductor device containing a matrix of configurable logic blocks (CLBs) interconnected by programmable fabric, allowing designers to implement custom digital logic after manufacturing. The Actel SX family belongs to the one-time-programmable (OTP) antifuse class of FPGAs, positioned within the broader programmable logic hierarchy: FPGA -> programmable logic IC -> CMOS digital IC. Antifuse technology stores configuration physically, giving it inherently high resistance to configuration upset compared with SRAM-based FPGAs. Key features of the A54SX32 include a sea-of-modules architecture that delivers very high routing efficiency and performance per gate, a maximum toggle rate of approximately 280 MHz, and a supply voltage range of 3.0 V to 3.6 V (nominal 3.3 V) with support for 5 V-tolerant operation modes. The sea-of-modules topology simplifies timing closure because every module sits within short routing reach, enabling dramatic reductions in design time, power consumption, and time to market for performance-intensive applications. Technically, the device provides 2880 combinational and sequential capability modules organized as a dense mesh. Because configuration is stored in antifuse elements rather than volatile SRAM, no external configuration PROM is required, reducing BOM cost and board space and improving system security since the bitstream is not readable. The PQG208 commercial temperature variant supports 0 C to +70 C ambient operation. Typical applications include industrial control and automation logic, communications and networking glue logic, test and measurement instrumentation, and mil/aero-adjacent ground equipment where one-time programmability and design security are valued. A key design consideration: antifuse FPGAs are OTP - an incorrect programming run consumes a device, so reserve spare I/Os and gate margin, and use Microchip Libero/Designer tool timing reports before committing to programming. This page synthesizes distributor pricing, same-package drop-in alternatives, and practical design notes not found in the manufacturer datasheet.

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A54SX32-TQ144

A54SX32-TQ144 - 32K Gate SX FPGA 113 I/O TQFP-144 | Microchip

The Microchip (Actel) A54SX32-TQ144 is a 32K system gate SX-family FPGA with 113 user I/Os, based on a sea-of-modules antifuse architecture, housed in a 144-pin thin quad flat package (TQFP/LQFP-144). Originally introduced by Actel and carried through Microsemi to Microchip Technology, it targets performance-intensive designs requiring deterministic, instant-on operation. A field-programmable gate array (FPGA) is an integrated circuit that implements custom digital logic through configurable logic modules and routing resources. Within the programmable logic hierarchy, the SX family sits in the one-time-programmable (OTP), antifuse-based FPGA class, positioned below the radiation-tolerant RTAX line and alongside the higher-performance SX-A family in the Actel/Microchip product taxonomy. Key features of the A54SX32 include 32,000 usable system gates implemented in a sea-of-modules architecture, 113 available user I/Os, and single-chip integration with no external configuration device required because antifuse programming is permanent and non-volatile at power-up. This eliminates configuration time and configuration readback security risks common to SRAM FPGAs. Architecturally, the SX family combines C-cells (combinational) and R-cells (register) in a sea-of-modules array, delivering gate-level performance approaching ASIC-like timing predictability. The 0.35 um-class process yields high toggle rates with low interconnect delay variation, making static timing analysis straightforward. Typical applications include industrial control, communications and networking glue logic, avionics and defense embedded controllers, and ASIC prototype translation, where instant-on behavior and design security matter. Design consideration: because the SX family is one-time programmable, verify the design thoroughly in simulation before programming production devices. This page synthesizes verified distributor pricing, pin-compatible same-family alternatives, and practical design notes not found in the manufacturer datasheet.

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A54SX32-TQ144I

A54SX32-TQ144I - 48K Gate SX FPGA, 113 I/O | Microchip Technology

The Microchip Technology A54SX32-TQ144I is a 48,000-system-gate Actel SX-family antifuse FPGA with 113 user I/O, 2880 logic array blocks (LABs), and 2.5V core operation, housed in a 144-pin TQFP (LQFP) surface-mount package rated for industrial temperatures. Its sea-of-modules architecture delivers ASIC-like performance and integration without the mask costs or NRE of a custom device. An FPGA (Field-Programmable Gate Array) is a programmable logic device that lets designers implement custom digital circuits by configuring internal logic blocks and interconnect after manufacturing. Within the programmable logic hierarchy, the SX family sits among high-performance one-time-programmable (OTP) antifuse FPGAs, sitting above CPLDs in density and below modern SRAM FPGAs in flexibility, but offering superior security and instant-on behavior because the configuration is hard-wired in silicon antifuse elements. Key features include a 32K system gate density class (approximately 48,000 gates per Microchip USA product documentation), 1800 logic cells organized into 2880 LABs, up to 238 MHz system performance on a 0.25 um process, and 113 user I/O pins in the 144-TQFP footprint. Because configuration data lives in antifuse connections, the device is immune to configuration readback attacks and requires no external boot memory, reducing BOM count and improving power-up reliability. Technically, the SX architecture uses a sea-of-modules fabric with fast local routing and segmented global interconnect, enabling deterministic, low-skew clocking for performance-intensive designs. Design entry uses Synopsys or third-party synthesis flows compiled through Microchip (Actel/Microsemi) Designer software. Typical applications include industrial control and automation logic, communications and networking glue logic, military/aerospace payloads needing OTP security, and bridge/interfacing circuits replacing multiple discrete devices. Design consideration: as a one-time-programmable device, verify the design fully in simulation before programming, and reserve spare I/O for engineering change margin. This page synthesizes distributor pricing, drop-in same-family alternatives, and practical design guidance not consolidated in the manufacturer datasheet.

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A54SX32-TQ144M

A54SX32-TQ144M - 32K Gate FPGA, 240MHz, TQFP-144 | Microchip

The Microchip Technology (Microsemi/Actel) A54SX32-TQ144M is a 32,000-gate antifuse FPGA from the SX family, fabricated on a 0.35 um CMOS process, delivering up to 240 MHz system performance in a 144-pin TQFP surface-mount package with 113 user I/Os. An FPGA (Field-Programmable Gate Array) is a semiconductor device that implements digital logic through programmable interconnect and configurable logic blocks, sitting within the broader hierarchy of programmable logic ICs alongside CPLDs and ASICs. The Actel SX family pioneered a sea-of-modules architecture, in which a dense array of logic modules is surrounded by routing resources, providing ASIC-like gate utilization and timing predictability without the NRE cost and lead time of a mask-programmed device. Key features include 32,000 equivalent system gates organized in 1,800 logic modules (2,880 CLB-equivalent cells), a maximum toggle rate of 240 MHz (up to 350 MHz for the -3 speed grade per Microchip documentation), and dual 3.3V/5V-tolerant I/O operation. The antifuse programming technology is one-time programmable, giving the device inherent resistance to configuration readback attacks and SEU-sensitive configuration memory issues that affect SRAM FPGAs. Technical depth: the sea-of-modules architecture uses two types of logic modules (C-cells for combinatorial logic and R-cells for registers) connected through a segmented routing fabric, enabling deterministic, short interconnect delays that made the SX family popular for high-speed state machines, bus interfaces, and glueless CPU support logic in embedded systems. Typical applications include industrial control and automation backplanes, aerospace and defense subsystems requiring non-volatile, power-up-immediate logic, communications line cards, and legacy design sustainment where the original Actel SX design files are still deployed. Design consideration: because the device is one-time programmable and antifuse-based, programming must be performed after assembly on the target board via the JTAG port; plan in-system programming access and verify the final netlist before burn, as rework is not possible. This page synthesizes distributor pricing, drop-in same-family alternatives, and practical design notes not found in the manufacturer datasheet, with pricing verified as of 2026-09-03.

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A54SX32-TQ176

A54SX32-TQ176 - 32K-Gate SX FPGA, TQFP-176 | Microchip

The Microchip (Actel/Microsemi) A54SX32-TQ176 is a 32,000-system-gate antifuse FPGA from the SX family, built on a 0.35 um process with up to 240 MHz performance, 147 user I/Os, and a 176-pin TQFP (24x24 mm) surface-mount package operating from a 3.3 V (3.0 V to 3.6 V) core supply with 5.0 V (4.75 V to 5.25 V) I/O capability. An FPGA (Field-Programmable Gate Array) is a semiconductor device containing a fabric of programmable logic blocks and interconnects that engineers configure after manufacturing, sitting in the hierarchy of programmable logic below full-custom ASICs and above fixed-function logic ICs. The SX family differs from SRAM-based FPGAs because it uses antifuse programming elements: the configuration is one-time programmable (OTP), non-volatile, and inherently immune to configuration-readout attacks and radiation-induced configuration upsets. Key features of the A54SX32 include a sea-of-modules architecture with 2880 logic modules, dual-voltage operation (3.3 V core, 5 V-tolerant I/O), and deterministic interconnect that delivers ASIC-like timing predictability. According to the Microchip SX family datasheet, the family was designed for performance-intensive applications requiring dramatic reductions in power consumption compared with SRAM FPGAs. Technically, the 0.35 um antifuse process provides low routing capacitance, which is the root cause of the SX family's speed advantage: signals travel through fewer buffered segments, so critical paths see lower delay and jitter. The OTP nature also removes the configuration PROM and power-up configuration time required by SRAM FPGAs, improving system boot behavior andglitch resistance. Typical applications include telecommunications and networking line cards, industrial control, aerospace and defense payloads, and test equipment glue-logic consolidation, where the combination of 32K gates, 147 I/Os, and 5 V-tolerant I/O matches legacy board designs. A critical design consideration is that this commercial-temperature (0 to 70 C) leaded part is obsolete and RoHS non-compliant; new designs should use the green A54SX32-TQG176 variants or plan a lifecycle strategy. This page synthesizes distributor availability, same-family drop-in variants, and obsolescence guidance not consolidated in the manufacturer datasheet.

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A54SX32-TQ176I

A54SX32-TQ176I - 32K Gate SX FPGA, 147 I/O, TQFP-176 | Microchip

The Microchip (Actel/Microsemi) A54SX32-TQ176I is a 32,000-system-gate antifuse FPGA from the SX family with 1800 logic modules, up to 240 MHz system performance, 147 user I/O, and dual supply rails of 3.3V and 5V (3.0V-3.6V and 4.75V-5.25V), housed in a 176-pin TQFP (24x24 mm) industrial-grade package. An FPGA (Field-Programmable Gate Array) is a semiconductor device containing a fabric of programmable logic blocks and interconnects that engineers configure in the field to implement custom digital circuits. Within the product hierarchy, the A54SX32 belongs to programmable logic ICs -> FPGA -> one-time-programmable antifuse FPGA, a category pioneered by Actel and continued under Actel, Microsemi, and now Microchip Technology. Key features include the sea-of-modules architecture that delivers ASIC-like routing efficiency and deterministic timing, one-time-programmable antifuse technology that is inherently secure and radiation-tolerant compared to SRAM FPGAs, zero standby power configuration retention without an external boot PROM, and the 0.35 um CMOS process enabling 240 MHz toggle rates. Technically, the SX family uses C-cells for combinational logic and R-cells for registers, connected through a three-level metal routing fabric. Because configuration is stored in antifuse elements rather than SRAM cells, the device powers up instantly with no configuration time and is immune to bitstream readback attacks. Typical applications include industrial control and automation, bridge logic between 5V and 3.3V systems, glue-logic consolidation, avionics and defense subsystems, and telecommunications line-card functions where instant-on and single-chip security matter. Design consideration: as a one-time-programmable device, verify the design thoroughly in simulation before programming, since a bitstream error consumes the physical part. This page synthesizes verified distributor availability data, same-footprint drop-in family variants, and engineering guidance not found in a single manufacturer datasheet.

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A54SX32-TQ176M

A54SX32-TQ176M - 32K-Gate Anti-Fuse FPGA, TQFP-176 | Actel/Microchip

The Actel (now Microchip Technology) A54SX32-TQ176M is a 32,000-gate anti-fuse FPGA from the SX family, featuring a sea-of-modules architecture with 1800 logic cells, a maximum toggle frequency of up to 240 MHz, and 0.35 um CMOS anti-fuse technology, housed in a 176-pin thin quad flat pack (TQFP-176) military temperature grade (-55C to +125C) package. An FPGA (Field-Programmable Gate Array) is a programmable logic device that lets designers implement custom digital circuits after manufacturing. The SX family uses Actel's one-time-programmable (OTP) anti-fuse interconnect, which differs fundamentally from SRAM-based FPGAs: configuration is permanent, non-volatile, and immune to configuration-readout, making it attractive for defense, avionics, and space systems. Within the power-management hierarchy of programmable logic, SX sits at the high-performance, single-event-hardened end of 1990s-era Actel silicon. Key features include a sea-of-modules architecture built from C-cells and R-cells (combinatorial and sequential logic modules), 3.3V core operation with 5V-tolerant I/O capability, a combinatorial delay of roughly 0.6 ns per logic module, and the very low routing delay typical of anti-fuse devices - which yields predictable, low-jitter timing unmatched by SRAM FPGAs of the same era. Technical depth: the SX architecture delivers gate utilization above typical FPGA norms because routing is fixed at manufacture, eliminating the large interconnect capacitance that limits SRAM FPGA speed. The 0.35 um process enables 240 MHz-class counter/toggle rates. The TQ176M suffix denotes the military temperature range (M grade, -55C to +125C) in a 0.5 mm pitch, 28 x 28 mm TQFP body. Typical applications include military and aerospace control logic, glueless bus interface and bridge logic, high-speed datapath and protocol engines, and mixed 3.3V/5V system integration in legacy industrial platforms. Design consideration: the device is one-time programmable - there is no field rework, so verify timing closure in Actel Designer / Libero before programming, and note that the leaded TQ176M finish is RoHS non-compliant for new commercial designs. This page synthesizes verified distributor data, drop-in same-family alternatives, pricing tiers, and practical design notes not found in the manufacturer datasheet.

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A54SX32-TQG144

A54SX32-TQG144 - 48K-Gate Antifuse FPGA, 144-TQFP | Microchip

The Microchip Technology A54SX32-TQG144 is a 48,000-gate antifuse FPGA from the Actel SX family, offering 2880 logic modules, 113 user I/O, and a 3.3V core supply in a 144-pin TQFP (LQFP-144) surface-mount package. An FPGA (Field-Programmable Gate Array) is a semiconductor device containing a fabric of programmable logic blocks and interconnects that designers configure to implement custom digital circuits. Within the programmable-logic hierarchy, the A54SX32 sits in the high-performance, one-time-programmable (OTP) segment: FPGA -> programmable logic device -> application-specific digital IC. Unlike SRAM FPGAs, its antifuse architecture retains its configuration permanently, requires no external configuration PROM, and powers up instantly with no configuration delay. Key features of the A54SX32-TQG144 include the SX family's sea-of-modules architecture, which delivers gate-level performance far above typical SRAM FPGAs of its era; 100% fillable logic fabric with 2880 C-cells and R-cells for combinational and sequential logic; and 113 user I/O distributed around the 144-lead thin quad flat package. The antifuse interconnect adds very low routing capacitance, supporting high clock rates and low dynamic power consumption. Technically, the device is manufactured on a CMOS process with metal-to-metal antifuse elements programmed at the factory-test stage or during board-level programming. Because the configuration is hard-wired, the part offers inherent resistance to bit-stream interception and radiation-induced configuration upsets, which is why the SX family is widely used in military and aerospace designs. Typical applications include high-speed glue logic integration, bus interfacing, coprocessor acceleration, telecom line-card control, and defense electronics that demand instant-on, secure, single-chip logic integration. A key design consideration is that antifuse devices are one-time programmable: there is no in-system reconfiguration, so designers must verify logic thoroughly before programming and keep spare routing capacity for engineering changes. This page adds distributor availability context, same-package drop-in alternatives, and practical design guidance not found in the manufacturer datasheet.

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A54SX32-TQG144I

A54SX32-TQG144I - 32K Gate FPGA 240MHz TQFP-144 | Microchip

The Microchip Technology (Microsemi) A54SX32-TQG144I is a 32,000-gate antifuse FPGA from the SX family with 1,800 logic cells, a maximum toggle frequency of 240 MHz, and 113 user I/O, housed in a 144-pin TQFP (TQG144) package rated for the industrial temperature range (-40C to +85C). A field-programmable gate array (FPGA) is a semiconductor device containing a matrix of configurable logic blocks (CLBs) and programmable interconnects that designers configure in the field, sitting within the broader hierarchy of programmable logic: FPGA -> programmable logic device -> digital IC. Unlike SRAM-based FPGAs, the Actel SX family uses antifuse programming elements that retain configuration permanently and are inherently resistant to configuration upset. Key features include the SX sea-of-modules architecture, which delivers application performance close to that of mask-programmed ASICs while eliminating NRE costs; a 0.35 um CMOS process; dual 3.3V/5V supply compatibility for legacy system integration; and up to 240 MHz system-level performance for compute-intensive glue logic, bus bridging, and state-machine functions. Technically, the sea-of-modules fabric provides high logic density per gate relative to coarser-grained SRAM architectures, with fast, predictable routing. The antifuse interconnect adds near-zero stray capacitance to switch paths, supporting the family's high toggle rates and low static power consumption. The 113 user I/O within the compact 144-lead low-profile quad flat package (0.5 mm terminal pitch) suits space-constrained industrial boards. Typical applications include industrial control and automation sequencing, telecommunications line-card glue logic, and aerospace/military subsystems requiring configuration immutability, where the A54SX32-TQG144I replaces multi-chip TTL/PLD solutions in a single device. Design consideration: the antifuse device is one-time programmable - final programming must occur at the production stage with verified design files, and JTAG-based programming equipment compatible with the Actel SX family is required. Plan the BOM accordingly since in-circuit design iterations require new devices. This page synthesizes distributor pricing tiers, drop-in same-family alternatives, and practical design notes not found in the manufacturer datasheet.

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A54SX32-TQG144M

A54SX32-TQG144M - SX FPGA 48K Gates 113 I/O | Microchip

The Microchip Technology A54SX32-TQG144M is an SX-family antifuse FPGA offering 48K system gates with 113 user I/O in a 144-pin TQFP (LQFP) gull-wing surface-mount package. It operates from a 2.5V core supply, uses 0.25 um CMOS process technology, and is graded for military temperature ranges, with lead-free (RoHS-style) termination indicated by the G suffix and M military designation. An FPGA (Field-Programmable Gate Array) is a semiconductor device that implements digital logic through programmable interconnect and logic cells, sitting within the broader hierarchy of programmable logic ICs that also includes CPLDs and structured ASICs. The Actel SX family uses a sea-of-modules antifuse architecture, in which connections are permanently programmed at power-up programming time, delivering ASIC-like performance, security, and low power consumption rather than SRAM-based reconfigurability. Key features include 32,000-gate (48K system gate) capacity on a 1,800-cell sea-of-modules fabric, up to 238 MHz toggle performance, and 113 user-input/output pins on the TQFP-144 footprint. Because antifuse programming is non-volatile and effectively one-time, the device requires no configuration PROM, boots instantly, and resists bitstream readback attacks, a key differentiator versus SRAM FPGAs. Architecturally, the SX family's sea-of-modules structure combines C-cells (combinatorial) and R-cells (sequential) with a segmented routing fabric, giving predictable, low-skew timing suitable for performance-intensive designs. The 0.25 um CMOS process and 2.5V core reduce dynamic power compared with older 5V and 3.3V programmable families. Typical applications include military and aerospace embedded control, industrial automation, communications interface bridging, and ASIC prototyping, where instant-on boot, design security, and low power matter. The military temperature grade suits harsh-environment defense programs. Design consideration: antifuse FPGAs are one-time programmable; complete design sign-off and timing closure in Libero/Microsemi toolchains before programming production devices. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.

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A54SX32-TQG176

A54SX32-TQG176 - 32K Gate FPGA, 147 I/O, TQFP-176 | Microsemi

The Microsemi (Microchip) A54SX32-TQG176 is an SX-family antifuse FPGA with 32,000 system gates, 1,800 logic cells, 147 user I/Os and up to 240 MHz system performance, housed in a 176-pin TQFP (24x24 mm) surface-mount package. It operates from dual supply rails of 3V to 3.6V and 4.75V to 5.25V in a 0.35 um process. An FPGA (Field-Programmable Gate Array) is a semiconductor device containing a fabric of programmable logic blocks and interconnects that designers configure after manufacturing. The SX family belongs to the broader hierarchy of programmable logic devices: FPGA -> programmable logic -> application-specific IC alternatives. Unlike SRAM FPGAs, the SX family uses Actel antifuse technology, which is non-volatile and one-time programmable, giving inherent resistance to configuration readback and radiation-induced configuration upsets. Key features of the A54SX32-TQG176 include a sea-of-modules architecture that delivers high gate utilization and predictable timing, 147 programmable I/O pins supporting 3.3V and 5V signaling environments, and instant-on power-up behavior with no external configuration device required. Because the antifuse fabric is programmed at the factory or in-house programmer, design security is significantly higher than flash- or SRAM-based FPGAs. The 0.35 um process with dual-rail supply allows direct interfacing with legacy 5V logic while the core runs at 3.3V, easing integration into industrial systems that mix voltage domains. System speeds up to 240 MHz support timing-critical glue logic, bus bridging, and state-machine consolidation. Typical applications include industrial control and automation, communications line cards, military/aerospace legacy designs, and 5V/3.3V mixed-voltage bus interface logic. The 176-TQFP package suits cost-sensitive, hand-assemblable or medium-volume boards that cannot justify BGA assembly. Design consideration: because the device is one-time programmable, verify the design fully in simulation and hardware prototyping before programming production devices; no design updates are possible in-system. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.

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A54SX32-TQG176I

A54SX32-TQG176I - 48K Gate FPGA, 147 I/O | Microchip

The Microchip (Microsemi) A54SX32-TQG176I is a 32,000-gate (48,000 system gate) SX-family antifuse FPGA with 1,800 logic cells, up to 147 user I/Os, and system performance up to 240 MHz, housed in a 176-pin LQFP/TQFP (24x24 mm) package with industrial temperature rating of -40C to +85C. An FPGA (Field-Programmable Gate Array) is a semiconductor device that implements custom digital logic through a fabric of configurable logic blocks and routing resources. Unlike SRAM-based FPGAs, the Actel SX family uses a antifuse (one-time programmable) interconnect, meaning configuration is permanent, non-volatile, and inherently immune to configuration-readout attacks and power-up configuration errors. The SX family sits within the broader programmable-logic hierarchy: FPGA -> programmable logic IC -> digital IC. Key features include the sea-of-modules architecture, which delivers gate-density utilization and performance levels beyond typical lookup-table (LUT) FPGAs of its generation, dual supply support of 3.0V-3.6V core and 4.75V-5.25V I/O operation, and 0.35um process technology optimized for speed and low power. The antifuse fabric removes the need for external configuration PROMs, reducing bill-of-material cost, board area, and time-to-first-logic. Technical depth: the SX architecture uses a sea-of-modules routing structure with dedicated fast carry logic, achieving predictable, ASIC-like timing. With 1800 cells and 147 user I/Os, the A54SX32 suits glue logic consolidation, bus interfacing, and state-machine intensive control designs requiring deterministic timing and instant-on operation. Typical applications include industrial automation control, military and aerospace subsystems requiring non-volatile, secure logic, telecommunications line cards, and test equipment. The 5V-tolerant I/O domain makes it a strong fit for legacy 5V bus environments. Design consideration: because the antifuse device is one-time programmable, complete functional simulation before programming is essential; there is no in-system reconfiguration. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.

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A54SX32A-1BGG329

A54SX32A-1BGG329 - 48K-Gate SX-A FPGA 329-BGA | Microchip

The Microchip Technology (Microsemi/Actel) A54SX32A-1BGG329 is a 48,000-gate antifuse field-programmable gate array (FPGA) from the SX-A family, delivering 2880 modules, 249 user I/O, and system speeds up to 278 MHz in a 329-ball plastic BGA (PBGA329) package with 1.27 mm ball pitch. Built on a 0.25 um CMOS process, this device operates from a 2.5V core supply and combines performance, security, and low power in a single-chip solution. An antifuse FPGA is a type of field-programmable gate array in which the interconnect configuration is permanently set at power-up programming via antifuse elements. Unlike SRAM-based FPGAs, antifuse devices are non-volatile and configuration is stored in the silicon itself, providing inherent security advantages and eliminating the need for external configuration memory. Within the programmable logic hierarchy, the SX-A family sits in the one-time-programmable (OTP) FPGA class, part of the broader FPGA -> programmable logic -> semiconductor device taxonomy. Key differentiating specifications include the 48K system gate count, 278 MHz system performance (speed grade -1), 249 available user I/O, and low static power consumption enabled by the antifuse architecture. The sea-of-modules architecture simplifies design migration and supports high-density integration of multiple functions into a single low-cost chip. Technically, the SX-A architecture uses a sea-of-modules structure built on the 0.25 um antifuse CMOS process, with clustered logic modules and a segmented routing fabric that yields deterministic, pin-to-pin timing. Because configuration is hard-wired, there is no configuration bitstream to intercept, making the device attractive for designs where bitstream security matters. The 329-ball BGA with 1.27 mm pitch provides reliable surface-mount assembly on standard PCB processes. Typical applications include industrial control systems, communications and networking line cards, aerospace and defense logic consolidation, and test-and-measurement equipment, where the combination of one-time programmability, security, and low power is valued. A key design consideration is that antifuse FPGAs are one-time programmable: prototype thoroughly in simulation and, if necessary, on lower-cost family members before committing programming on production devices. This page synthesizes distributor availability data, verified drop-in alternatives within the SX-A and SX families, and practical design notes not found in the manufacturer datasheet, providing engineers a complete sourcing and engineering reference for the A54SX32A-1BGG329.

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A54SX32A-1BGG329I

A54SX32A-1BGG329I - 48K Gate FPGA, 249 I/O, 329-BGA | Microchip

The Microchip Technology (Microsemi) A54SX32A-1BGG329I is a 48K-system-gate antifuse FPGA from the SX-A family, offering 249 user I/O, 2880 logic cells, and up to 278 MHz system performance in a 329-ball PBGA (BGG329) package with 1.27 mm ball pitch. An FPGA (Field-Programmable Gate Array) is a semiconductor device containing a matrix of configurable logic blocks (CLBs) interconnected by programmable interconnects, allowing designers to implement custom digital logic after manufacturing. Within the programmable logic hierarchy, the A54SX32A sits at the mid-density tier of the SX-A antifuse family, above the SX08/SX16 devices and below the SX72. Antifuse FPGAs are one-time programmable (OTP): their configuration is permanently set at programming time, giving inherent resistance to bit-flip configuration corruption and no need for an external configuration flash. Key features include a 2.5V core supply, 0.25 um CMOS process technology, a -1 speed grade supporting toggle rates up to 278 MHz, and industrial temperature operation signified by the I suffix. The 249 available I/O provide substantial interface capability for glue logic consolidation, bus bridging, and control-plane designs. Technically, the SX-A architecture uses a sea-of-modules fabric with combinational and sequential cells; the 2880 CLB/cell count maps to approximately 48,000 system gates. Because the device is OTP antifuse, designers verify logic thoroughly in simulation before programming, since the bitstream cannot be re-flashed in the field. Typical applications include industrial control and automation, telecommunications line cards, aerospace and defense systems where configuration security matters, and legacy system sustenance where the SX-A family remains the qualified solution. Design consideration: plan power distribution for a single 2.5V supply domain and account for the one-time-programmable nature by reserving spare logic and I/O in your design budget. This page synthesizes distributor pricing, drop-in alternatives within the same 329-ball package family, and practical design notes not found in the manufacturer datasheet.

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A54SX32A-1BGG329M

A54SX32A-1BGG329M - SX-A FPGA 48K Gates 329-BGA | Microchip

The Microchip Technology (Microsemi) A54SX32A-1BGG329M is an SX-A family antifuse FPGA with 32K gates (48K system gates), 1800 logic cells, up to 249 user I/Os, and a 278 MHz system performance rating, housed in a 329-ball BGA package on 0.25 um CMOS technology with a 2.5V core supply. An FPGA (Field-Programmable Gate Array) is a semiconductor device containing a matrix of configurable logic blocks interconnected by programmable routing, allowing designers to implement custom digital circuits after manufacturing. Within the programmable logic hierarchy, the SX-A family sits among one-time-programmable antifuse FPGAs, positioned under the broader categories of programmable logic devices, digital logic ICs, and semiconductors. Unlike SRAM FPGAs, antifuse devices retain their configuration permanently and power up instantly with no external boot configuration memory. Key features include 48K system gates of antifuse-based programmable logic, up to 249 user-programmable I/Os in the 329-BGA package, and a 278 MHz toggle/system frequency enabled by the 0.25 um process. The 2.5V core supply keeps dynamic power low, and the one-time-programmable (OTP) antifuse architecture inherently resists configuration readback, providing design security advantages plus immunity to configuration-upset issues in harsh environments. Technically, the SX-A architecture uses a fine-grained sea-of-modules structure with combinational and sequential logic modules, enabling efficient synthesis of state machines, glue logic, bus interfaces, and data-path functions. The -1 speed grade balances performance and cost, and the M suffix denotes a specific shipping media variant per Microchip ordering conventions. Typical applications include military and aerospace systems requiring instant-on, secure configuration, industrial control backplanes, communications line-card glue logic, and obsolescence mitigation for legacy Actel/Microsemi designs still in field service. Design consideration: because the device is one-time-programmable, thoroughly verify the design in simulation and, where feasible, prototype in an SRAM-based device before committing to antifuse programming. This page synthesizes verified distributor data, drop-in alternatives, and practical design guidance not found in the manufacturer datasheet.

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A54SX32A-1FGG256

A54SX32A-1FGG256 - SX-A FPGA, 48K Gates, 256-FBGA | Microchip

The Microchip Technology (formerly Microsemi/Microsemi formerly Actel) A54SX32A-1FGG256 is an SX-A family antifuse FPGA offering 48,000 system gates (32,000 typical gates) with 2880 configurable logic blocks (CLBs), 203 user I/O, and a maximum clock frequency of 278 MHz, housed in a 256-ball Fine-Pitch Ball Grid Array (FBGA) package. A field-programmable gate array (FPGA) is a semiconductor device containing a matrix of configurable logic blocks interconnected by programmable fabric, allowing designers to implement custom digital circuits after manufacturing. The SX-A family sits in the FPGA hierarchy as a one-time-programmable (antifuse) device, part of the broader programmable logic category alongside CPLDs and flash-based FPGAs. Antifuse technology means the configuration is permanent, inherently secure, and immune to configuration-readback attacks, with no external configuration PROM required at power-up. Key features of the A54SX32A-1FGG256 include a 0.25 um CMOS process, a 2.5V core supply, and a combinatorial CLB delay as low as 1.1 ns, delivering fast, deterministic single-chip logic integration. With 1800 logic cells, the device suits mid-density glue logic, bus interface, and control-path designs. The 203 available I/O support common 2.5V and 3.3V signaling environments used in industrial and embedded systems. Architecturally, the SX-A fabric uses a sea-of-modules structure with combinational and sequential modules, enabling efficient mapping of wide decoders, state machines, and datapath functions. Because configuration is stored in antifuse elements rather than SRAM cells, there is no configuration time at power-up, a design advantage over SRAM FPGAs, and resulting designs are resistant to bitstream cloning. Typical applications include industrial control and automation, communications and networking line cards, avionics and defense systems requiring configuration security, and legacy ASIC/ASSP bridging where a permanent, low-power single-chip logic solution is preferred. A key design consideration: the 2.5V core and fixed antifuse routing mean the design must be fully frozen before commit; simulation and timing verification should be completed prior to programming, since a programmed device cannot be erased or reprogrammed. This page synthesizes distributor pricing, verified drop-in alternatives, and practical design notes not found in the manufacturer datasheet, with data verified as of 2026-09-03.

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A54SX32A-1FGG256I

A54SX32A-1FGG256I - 48K Gate FPGA, 203 I/O, FBGA-256 | Microchip

The Microchip Technology (Microsemi) A54SX32A-1FGG256I is an SX-A family antifuse Field Programmable Gate Array (FPGA) with 48,000 system gates, 2,880 logic cells (modules), 203 user I/O, and industrial temperature range operation, housed in a 256-ball fine-pitch BGA (FBGA-256 / PBGA256) package with 1 mm ball pitch. An FPGA (field-programmable gate array) is a semiconductor device containing a matrix of configurable logic blocks (CLBs) and programmable interconnects that the designer wires together after manufacturing, in contrast to fixed-function ASICs. In the programmable logic hierarchy, FPGA -> programmable logic IC -> logic IC -> semiconductor. The SX-A family uses antifuse programmable interconnect technology, which is one-time programmable: the configuration is non-volatile, immune to configuration readback attacks, and requires no external boot flash, reducing bill-of-materials cost and improving startup reliability. Key features of the A54SX32A-1FGG256I include 0.25 um CMOS process technology, a 2.5 V core supply, system-level toggle performance in the 172 MHz to 278 MHz range depending on speed grade and source cited, and the industrial grade (suffix I) temperature rating of -40C to +125C. The -1 speed grade balances cost with typical system performance. Antifuse FPGAs also draw near-zero static configuration power compared with SRAM FPGAs, making them attractive for power-sensitive industrial designs. The device suits glue logic consolidation, bus interfacing, state machines, and ASIC prototype bridging in industrial control, communications equipment, medical instrumentation, and aerospace/defense applications where configuration security and radiation-tolerant heritage matter. Designers should note that antifuse devices are one-time programmable: design changes require a new physical part, so finalizing the design before programming and committing to adequate design verification is essential. This page synthesizes distributor pricing, drop-in family alternatives, lifecycle guidance, and practical design notes not found in a single manufacturer datasheet, giving engineers and buyers one citable reference point.

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A54SX32A-1FGG256M

A54SX32A-1FGG256M - 48K-Gate SX-A FPGA, 256-BGA | Microchip

The Microchip Technology (Microsemi) A54SX32A-1FGG256M is a 48,000-system-gate antifuse FPGA from the SX-A family, fabricated on a 0.22 um process, supplied at 2.5V core (2.25V to 5.25V operating range per distributor data), with 203 usable I/Os in a 256-ball Fine-Pitch BGA (17x17 mm) package rated for the -55C to +125C military temperature range. An FPGA (Field-Programmable Gate Array) is a semiconductor device containing a fabric of programmable logic blocks and interconnects that designers configure after manufacturing. Within the programmable-logic hierarchy - FPGA -> programmable logic device -> digital IC - antifuse FPGAs like the SX-A are one-time-programmable (OTP): configuration is permanently written, giving inherent resistance to configuration readback attacks and no need for an external configuration flash, which improves system reliability and security compared to SRAM FPGAs. Key features include the sea-of-modules architecture built from two logic module types: the C-cell (combinatorial) and R-cell (register), providing essentially lossless floorplan area utilization. The -1 speed grade balances performance and cost, the 256-FPBGA footprint supports high-density surface-mount assembly, and the wide 2.25V to 5.25V supply tolerance plus military-grade temperature rating make it suitable for harsh environments. RoHS3 compliance (the M suffix denotes moisture-sensitivity/lead-free flow per distributor listings) supports modern assembly processes. Architecturally, the SX-A covers the entire die with a grid of logic modules and routing, so virtually no chip area is lost to interconnect. The 32K-gate-class A54SX32A die (marketed at 48K system gates) integrates multiple glue-logic, interface, and control functions into a single low-cost chip, replacing multi-chip PAL/GAL/ASIC solutions and reducing board area, power, and BOM cost. Typical applications include aerospace and defense control logic, industrial automation controllers, communications interface bridging, and test equipment, where one-time programmability, instant-on startup, and tamper resistance matter more than reprogrammability. Design consideration: because SX-A devices are OTP, verify your design thoroughly in simulation (Libero SoC / Designer flow) before programming; there is no design iteration on the same silicon, so account for the approximately 20-week manufacturer lead time in your procurement plan. This page synthesizes distributor inventory and pricing signals, same-package drop-in variants, and practical design guidance not consolidated in the manufacturer datasheet.

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Товары (32787)

A54SX32-CQ256M - 32K Gate SX FPGA 205MHz CQFP-256 | Microsemi

A54SX32-PQ208 - SX FPGA, 48K Gates, 174 I/O | Microchip

A54SX32-PQ208I - 48K Gate FPGA 174 I/O PQFP-208 | Microchip

A54SX32-PQ208M - 48K Gate FPGA, 174 I/O, PQFP-208 | Microchip

A54SX32-PQG208 - 32K-Gate SX FPGA, 208-PQFP | Microchip

A54SX32-PQG208I - SX FPGA 48K Gates 174 I/O | Microchip

A54SX32-PQG208M - SX FPGA 32K Gates 208-QFP | Microchip

A54SX32-TQ144 - 32K Gate SX FPGA 113 I/O TQFP-144 | Microchip

A54SX32-TQ144I - 48K Gate SX FPGA, 113 I/O | Microchip Technology

A54SX32-TQ144M - 32K Gate FPGA, 240MHz, TQFP-144 | Microchip

A54SX32-TQ176 - 32K-Gate SX FPGA, TQFP-176 | Microchip

A54SX32-TQ176I - 32K Gate SX FPGA, 147 I/O, TQFP-176 | Microchip

A54SX32-TQ176M - 32K-Gate Anti-Fuse FPGA, TQFP-176 | Actel/Microchip

A54SX32-TQG144 - 48K-Gate Antifuse FPGA, 144-TQFP | Microchip

A54SX32-TQG144I - 32K Gate FPGA 240MHz TQFP-144 | Microchip

A54SX32-TQG144M - SX FPGA 48K Gates 113 I/O | Microchip

A54SX32-TQG176 - 32K Gate FPGA, 147 I/O, TQFP-176 | Microsemi

A54SX32-TQG176I - 48K Gate FPGA, 147 I/O | Microchip

A54SX32A-1BGG329 - 48K-Gate SX-A FPGA 329-BGA | Microchip

A54SX32A-1BGG329I - 48K Gate FPGA, 249 I/O, 329-BGA | Microchip

A54SX32A-1BGG329M - SX-A FPGA 48K Gates 329-BGA | Microchip

A54SX32A-1FGG256 - SX-A FPGA, 48K Gates, 256-FBGA | Microchip

A54SX32A-1FGG256I - 48K Gate FPGA, 203 I/O, FBGA-256 | Microchip

A54SX32A-1FGG256M - 48K-Gate SX-A FPGA, 256-BGA | Microchip