10AS057H3F34E2LG vs 10AS057H3F34I2LG Сравнение
Подробное сравнение бок о бок 10AS057H3F34E2LG от Intel и 10AS057H3F34I2LG от Intel. Сравните ключевые характеристики, электрические параметры, упаковку, статус жизненного цикла, цены и наличие, чтобы выбрать лучший компонент для ваших требований.
Intel
10AS057H3F34I2LG - Arria 10 SX SoC FPGA, 570K LE, Dual ARM Cortex-A9 | Intel
10AS057H3F34I2LG ✓ АктивенСравнение характеристик
| Параметр | 10AS057H3F34E2LG | 10AS057H3F34I2LG |
|---|---|---|
| Бренд | Intel | Intel |
| Категория | FPGA & CPLD | FPGA & CPLD |
| Статус жизненного цикла | Активен | Активен |
| Наличие | In Stock | In Stock |
| Цена за единицу (USD) | $2.485,00 | $2.950,00 |
| Family | Arria 10 SX SoC FPGA | Arria 10 SX SoC FPGA |
| Logic Elements | 570000 | 570 K |
| Hard Processor System | Dual ARM Cortex-A9 MPCore with CoreSight | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Maximum Frequency | 1.5 GHz | — |
| User I/O Count | 492 | — |
| Package Type | 1152-ball FCBGA (FineLine BGA) | — |
| Package Size | 35 mm x 35 mm | — |
| Speed Grade | H3 (enhanced performance) | I2 (mid-speed, industrial) |
| Рабочая температура | [DATA_NEEDED: operating temperature range for E2] | — |
| Напряжение питания | [DATA_NEEDED: core/IO/transceiver rail voltages] | — |
| Process Technology | TSMC 20 nm | — |
| Embedded Memory | [DATA_NEEDED: total BRAM Mbits] | — |
| DSP Blocks | [DATA_NEEDED: number of DSP blocks and precision support] | — |
| Transceivers | [DATA_NEEDED: transceiver count and max data rate] | Up to 16.7 Gbps (per Arria 10 family) |
| Статус RoHS | Compliant (LG suffix = lead-free) | Compliant |
| Тип монтажа | Surface Mount (BGA) | Surface Mount |
| HPS Maximum Core Frequency | — | 1.5 GHz |
| Корпус | — | 1152-ball FCBGA (F34, 35x35 mm) |
| Process Node | — | 20 nm |
| Operating Temperature (Industrial) | — | -40 C to +100 C (junction) |
| User I/O | — | 492 (per Heisener listing) |
| Hard Memory Controllers | — | DDR3/DDR4 with ECC |
| Уровень MSL | — | [DATA_NEEDED: MSL level] |
| Supply Voltage (Core) | — | [DATA_NEEDED: core VCC] |