5CSEBA6U19C7SN vs 5CSEBA6U19C6N Сравнение
Подробное сравнение бок о бок 5CSEBA6U19C7SN от Intel и 5CSEBA6U19C6N от Altera. Сравните ключевые характеристики, электрические параметры, упаковку, статус жизненного цикла, цены и наличие, чтобы выбрать лучший компонент для ваших требований.
Сравнение характеристик
| Параметр | 5CSEBA6U19C7SN | 5CSEBA6U19C6N |
|---|---|---|
| Бренд | Intel | Altera |
| Категория | FPGA & CPLD | FPGA & CPLD |
| Статус жизненного цикла | Активен | Активен |
| Наличие | In Stock | In Stock |
| Цена за единицу (USD) | $149,85 | $194,15 |
| Series | Cyclone V SE SoC FPGA | Cyclone V SE SoC FPGA |
| Family | 5CSEBA6 (Cyclone V SE, 110K LE) | — |
| Logic Elements | 110,000 | 110K |
| Hard Processor System | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| HPS Maximum Clock Frequency | 800 MHz | — |
| User I/O Pins | 66 (FPGA fabric, per distributor listing) | — |
| Total Package Pins | 484 | — |
| Package Type | 484-UBGA (Ultra BGA), 19x19 mm | — |
| Тип монтажа | Surface Mount (BGA) | Surface Mount (BGA) |
| Рабочая температура | Industrial grade (per part number code) | -40C to +100C (industrial) |
| Статус RoHS | Compliant | Compliant (per Altera/Intel product page) |
| Lead-Free | Yes | — |
| FPGA Process Node | Low-power TSMC process | — |
| On-Chip Memory | Embedded SRAM (FPGA fabric) | — |
| DSP Blocks | Variable-precision DSP blocks (Cyclone V architecture) | Variable-precision DSP |
| Transceivers | Not enabled on this SE variant | — |
| Manufacturer | — | Altera (Intel) |
| Device Variant | — | 5CSEA6 (U19 package) |
| HPS Architecture | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Frequency | — | 925 MHz |
| FPGA Speed Grade | — | -6 (industrial) |
| Корпус | — | 484-UBGA (UBGА, 19x19 mm) |
| Число выводов | — | 484 |
| Process Technology | — | TSMC 28 nm low-power |
| User I/O | — | 66 (per Heisener) / configurable LVDS/LVCMOS |
| Hard IP Blocks | — | PCIe Gen2, multi-port memory controller, ARM Cortex-A9 HPS |
| Memory | — | Embedded M10K blocks |
| Уровень MSL | — | 3 (per BGA package) |