EP1S10F780I6N vs EP1S10F780C5N Сравнение
Подробное сравнение бок о бок EP1S10F780I6N от Intel и EP1S10F780C5N от Intel. Сравните ключевые характеристики, электрические параметры, упаковку, статус жизненного цикла, цены и наличие, чтобы выбрать лучший компонент для ваших требований.
Intel
EP1S10F780C5N - Stratix 10570 Cells FPGA, 780-FBGA | Intel (Altera)
EP1S10F780C5N ⚠ Последняя закупкаСравнение характеристик
| Параметр | EP1S10F780I6N | EP1S10F780C5N |
|---|---|---|
| Бренд | Intel | Intel |
| Категория | FPGA & CPLD | FPGA & CPLD |
| Статус жизненного цикла | NRND | Последняя закупка |
| Наличие | In Stock | In Stock |
| Цена за единицу (USD) | $98,75 | $195,00 |
| Family | Stratix | Stratix |
| Logic Elements | 10,570 | 10570 |
| Logic Array Blocks (LABs) | 1,057 | — |
| User I/Os | 426 | — |
| Embedded RAM (Total) | 920,448 bits | — |
| M512 Blocks | 94 (32 x 18 bits each) | — |
| M4K Blocks | 60 (128 x 36 bits each) | — |
| M-RAM Blocks | 1 (4 Kbit) | — |
| PLLs | 6 | [DATA_NEEDED: PLL count] |
| Clock Outputs | 16 | — |
| DSP Blocks | 12 | 12 (per family datasheet) |
| Transceiver Channels | 12 (not populated on I6 speed grade) | — |
| Core Voltage (VCCINT) | 1.5 V | — |
| I/O Voltage (VCCIO) | 1.5 V, 1.8 V, 2.5 V, 3.3 V (per bank) | — |
| Process Technology | 0.13 µm CMOS | 130 nm CMOS |
| Рабочая температура | -40 °C to +100 °C (industrial) | 0C to +85C (Commercial) |
| Speed Grade | -6 (6.0 ns core clock period) | C5 |
| Корпус | 780-ball FineLine BGA, 29 x 29 mm, 1.0 mm pitch | 780-ball FBGA (29 x 29 mm, 1 mm pitch) |
| Тип монтажа | Surface Mount | Surface Mount |
| Уровень MSL | 3 (168 hours) | — |
| Статус RoHS | [DATA_NEEDED: RoHS compliance status] | Compliant (N suffix) |
| Configuration Modes | Active Serial (AS), Passive Serial (PS), JTAG | Passive Serial, Active Serial, JTAG |
| Logic Family | CMOS | — |
| Supply Voltage Nominal | 1.5 V | — |
| Total RAM Bits | — | 920448 |
| User I/O Count | — | 426 |
| Core Voltage | — | 1.5 V |
| Internal Operating Frequency (max) | — | 500 MHz |
| Number of Logic Array Blocks (LABs) | — | [DATA_NEEDED: LAB count] |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, SSTL, LVDS (per family datasheet) |
| Lead-Free | — | Yes |