EP2AGX190FF35I3N vs EP2AGX190FF35I3G Сравнение
Подробное сравнение бок о бок EP2AGX190FF35I3N от Intel и EP2AGX190FF35I3G от Altera. Сравните ключевые характеристики, электрические параметры, упаковку, статус жизненного цикла, цены и наличие, чтобы выбрать лучший компонент для ваших требований.
Intel
EP2AGX190FF35I3N - Arria II GX FPGA, 181K LE, 612 I/O, FCBGA-1152 | Intel
EP2AGX190FF35I3N ⚠ Последняя закупкаAltera
EP2AGX190FF35I3G - Arria II GX FPGA 190K LE | Intel | Altera
EP2AGX190FF35I3G ⚠ Последняя закупкаСравнение характеристик
| Параметр | EP2AGX190FF35I3N | EP2AGX190FF35I3G |
|---|---|---|
| Бренд | Intel | Altera |
| Категория | FPGA & CPLD | FPGA & CPLD |
| Статус жизненного цикла | Последняя закупка | Последняя закупка |
| Наличие | In Stock | In Stock |
| Цена за единицу (USD) | $1.190,00 | $1.840,00 |
| Family | Arria II GX | Arria II GX |
| Logic Elements | 181,165 | — |
| Logic Array Blocks (LABs) | 7,612 | — |
| User I/O Pins | 612 | 612 |
| Process Technology | 40 nm TSMC low-power | — |
| Core Voltage | 0.9 V | 0.9 V |
| Transceiver Speed (max) | 3.75 Gbps (data rate, per family datasheet) | — |
| Total Transceivers | [DATA_NEEDED: transceiver count per FF35 package] | — |
| Embedded Memory | [DATA_NEEDED: M20K block count and total bits] | — |
| DSP Blocks | [DATA_NEEDED: variable-precision DSP block count] | — |
| PLLs | [DATA_NEEDED: PLL count for FF35 device] | [DATA_NEEDED: PLL count] |
| Корпус | 1152-ball FC-FBGA (FCBGA), 35 mm | 1152-ball FC-FBGA (FF35), 35 mm body |
| Тип монтажа | Surface Mount | Surface Mount (flip-chip BGA) |
| Рабочая температура | -40 °C to +100 °C (industrial, I3 grade) | -40 °C to +100 °C (industrial, suffix I) |
| Configuration | Serial / Parallel, supports encryption and remote update | — |
| Статус RoHS | Compliant (per Altera/Intel product page) | Compliant (suffix G) |
| Logic Elements (LE) | — | 181,165 |
| Adaptive Logic Modules (ALM) | — | [DATA_NEEDED: ALM count] |
| Embedded Memory (bits) | — | 10,177,536 |
| Number of I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Transceivers | — | 8 high-speed transceiver channels (multi-gigabit) |
| Embedded Multipliers | — | [DATA_NEEDED: 18x18 multiplier count] |
| I/O Voltage Standards | — | 1.2 V to 3.3 V (LVTTL, LVCMOS, LVDS, HSTL, SSTL) |
| Process Node | — | 40 nm |
| Speed Grade | — | 3 |
| Ball Pitch | — | [DATA_NEEDED: 1.0 mm (typical for FF35)] |
| Lead-Free | — | Yes |
| Programming Toolchain | — | Quartus II / Quartus Prime |