EPC16QI100TBAC vs EPC16QC100N Сравнение
Подробное сравнение бок о бок EPC16QI100TBAC от Altera и EPC16QC100N от Altera. Сравните ключевые характеристики, электрические параметры, упаковку, статус жизненного цикла, цены и наличие, чтобы выбрать лучший компонент для ваших требований.
Altera
EPC16QI100TBAC - Altera Enhanced Configuration PROM 16Mb | FPGA
EPC16QI100TBAC ⚠ Последняя закупкаСравнение характеристик
| Параметр | EPC16QI100TBAC | EPC16QC100N |
|---|---|---|
| Бренд | Altera | Altera |
| Категория | Memory ICs | Memory ICs |
| Статус жизненного цикла | Последняя закупка | Obsolete |
| Наличие | In Stock | In Stock |
| Цена за единицу (USD) | $15,95 | $24,10 |
| Memory Density | 16 Mbit (2 Mbyte) | — |
| Тип памяти | Flash (Enhanced Configuration Device) | — |
| Напряжение питания | 3.3 V | — |
| Configuration Modes | Passive Parallel Synchronous (PPS), Passive Parallel Asynchronous (PPA), Passive Serial (PS) | — |
| Maximum Configuration Clock | 40 MHz | — |
| Number of Configuration Pages | Up to 8 (selectable via PGM[2..0]) | — |
| Корпус | 100-pin PQFP (20 x 14 mm) | 100-pin PQFP (20 x 14 mm) |
| In-System Programmable | Yes (via JTAG / IEEE 1149.1) | — |
| JTAG Support | Yes (IEEE 1149.1 boundary-scan and programming) | — |
| Supported FPGA Families | Altera Stratix, Cyclone, Arria series | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX |
| Data Compression | Supported (15-30% density gain depending on target FPGA) | — |
| Рабочая температура | -40C to +85C (industrial) | 0 C to 70 C |
| Тип монтажа | Surface Mount (PQFP) | Surface Mount |
| Уровень MSL | 3 (168 hours) | — |
| Lead-Free / RoHS | Lead-free (per JEDEC J-STD-020); RoHS compliance: [DATA_NEEDED] | — |
| Dynamic Reconfiguration | Yes (page mode via PGM[2..0] pins) | — |
| Configuration Controller | Integrated | — |
| Programming Interface | JTAG / 4-wire passive serial | — |
| Размер памяти | — | 16 Mbit (16,777,216 bits) |
| Programmable Type | — | In System Programmable |
| Configuration Clock Frequency | — | 33 MHz max |
| On-Chip Decompression | — | Yes (supports compressed bitstreams) |
| Supply Voltage (VCC) | — | 3.0 V to 3.6 V |
| Access Time | — | 90 ns typical |
| Flash Read Bandwidth | — | 160 Mbps (16-bit DQ at 10 MHz) |
| Configuration Interface | — | FPP / PS / AS via dedicated FPGA pins |
| JTAG (IEEE 1149.1) ISP | — | Supported |
| Lead Free | — | Yes (per datasheet) |
| Packaging | — | Tray |