EPC16UC88 vs EPC16UC88SS Сравнение
Подробное сравнение бок о бок EPC16UC88 от Altera и EPC16UC88SS от Intel. Сравните ключевые характеристики, электрические параметры, упаковку, статус жизненного цикла, цены и наличие, чтобы выбрать лучший компонент для ваших требований.
Сравнение характеристик
| Параметр | EPC16UC88 | EPC16UC88SS |
|---|---|---|
| Бренд | Altera | Intel |
| Категория | Memory ICs | Memory ICs |
| Статус жизненного цикла | Unknown | Активен |
| Наличие | In Stock | In Stock |
| Цена за единицу (USD) | $0,00 | $8,45 |
| Device Type | In-system programmable configuration PROM for FPGAs | — |
| Configuration Memory Capacity | 16 Mb | — |
| Напряжение питания | 3.3 V core and I/O | — |
| Корпус | 88-UBGA (11x8) | SOIC-8 |
| Package Family | UBGA | — |
| In-System Programmability | IEEE Std. 1532 compatible | — |
| Programming Language Support | Jam Standard Test and Programming Language (STAPL) | — |
| JTAG Boundary Scan | Supported | — |
| nINIT_CONF Function | Allows private JTAG instruction to start FPGA configuration | — |
| Configuration Architecture | Configuration controller and flash memory | — |
| FPGA Configuration Use | Automatic configuration after power-up or system initialization | — |
| Data Output | Configuration data output controlled by OE and nCS | — |
| Output Control | OE and nCS control tri-state buffer and address counter | — |
| Тип монтажа | Surface mount | — |
| Package Dimensions | 11 mm x 8 mm | — |
| Статус RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| REACH Status | [DATA_NEEDED: REACH status] | — |
| Рабочая температура | [DATA_NEEDED: operating temperature] | -40C to +85C (commercial) |
| Output Current | [DATA_NEEDED: output current] | — |
| Configuration Frequency | [DATA_NEEDED: configuration frequency] | — |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification] | — |
| Manufacturer | — | Intel (formerly Altera) |
| MPN | — | EPC16UC88SS |
| Part Type | — | FPGA Configuration PROM |
| Memory Density | — | 16 Mbit |
| Интерфейс | — | 4-pin serial (nCS, DCLK, DATA, ASDI) |
| Configuration Mode | — | Active Serial (AS) - compressed |
| Operating Voltage | — | 3.3 V nominal (2.7 V to 3.6 V range) |
| Maximum DCLK Frequency | — | 100 MHz (fast mode) |
| Program/Erase Endurance | — | 100,000 cycles (per sector) |
| Data Retention | — | 20 years minimum |
| Cascading | — | Multi-device chain supported via nCS-OE daisy |
| In-System Programming | — | Yes (JTAG/ASDI) |
| Уровень MSL | — | 1 (unlimited floor life at <=30C/85% RH) |
| Compatible FPGA Families | — | Cyclone II/III/IV, Stratix II/III/IV, Arria GX |
| Compression Support | — | Yes (Intel/Altera compressed bitstream) |