EPC16UC8B vs EPC16UI8B Сравнение
Подробное сравнение бок о бок EPC16UC8B от Intel и EPC16UI8B от Altera. Сравните ключевые характеристики, электрические параметры, упаковку, статус жизненного цикла, цены и наличие, чтобы выбрать лучший компонент для ваших требований.
Сравнение характеристик
| Параметр | EPC16UC8B | EPC16UI8B |
|---|---|---|
| Бренд | Intel | Altera |
| Категория | FPGA & CPLD | FPGA & CPLD |
| Статус жизненного цикла | NRND | NRND |
| Наличие | In Stock | In Stock |
| Цена за единицу (USD) | $7,10 | $12,50 |
| Product Type | Enhanced Configuration Device | — |
| Manufacturer | Intel (formerly Altera) | — |
| Configuration Memory Density | 16 Mb | — |
| FPGA Family Supported | Altera SRAM-based LUT FPGAs (Cyclone, Stratix, APEX) | — |
| Configuration Modes | Passive Serial (PS), Passive Parallel Asynchronous (PPA), Passive Parallel Synchronous (PPS), Fast Passive Parallel (FPP) | — |
| Core Supply Voltage (VCC) | 3.3 V | — |
| I/O Supply Voltage (VIO) | 1.8 V / 2.5 V / 3.3 V | — |
| Programmability | In-system programmable via IEEE 1532 / JTAG | — |
| Configuration Pages | 16 pages x 1 Mb each | — |
| Корпус | 8-pin QFP (UC8B suffix) | USON-8 / WSON-8 (8-pin) |
| Тип монтажа | Surface Mount | Surface Mount |
| Рабочая температура | [DATA_NEEDED: Operating temperature range] | -40 C to +85 C (Industrial) |
| Уровень MSL | [DATA_NEEDED: MSL rating] | — |
| Статус RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | [DATA_NEEDED: Lead-free status] | [DATA_NEEDED: lead-free status] |
| Handshake Pins | nSTATUS, CONF_DONE, nCONFIG, OE | — |
| Family | EPC16 (Enhanced Configuration) | — |
| Memory Density | — | 16 Mbit (2 MB) |
| Функция | — | Enhanced Configuration Device for SRAM-based LUT FPGAs |
| Интерфейс | — | Active Serial (AS), JTAG |
| Напряжение питания | — | 2.5 V / 3.3 V |
| Architecture | — | Multi-page flash, up to 8 pages |
| In-System Programming | — | Yes (JTAG) |
| Compression Support | — | Yes (bitstream decompression) |
| Remote System Upgrade | — | Yes |
| Cascade Support | — | Yes (multi-FPGA) |
| Silicon Revision | — | B (second revision) |