EPM240M100C4N vs EPM240GM100I5N Сравнение
Подробное сравнение бок о бок EPM240M100C4N от Intel и EPM240GM100I5N от Intel. Сравните ключевые характеристики, электрические параметры, упаковку, статус жизненного цикла, цены и наличие, чтобы выбрать лучший компонент для ваших требований.
Сравнение характеристик
| Параметр | EPM240M100C4N | EPM240GM100I5N |
|---|---|---|
| Бренд | Intel | Intel |
| Категория | FPGA & CPLD | FPGA & CPLD |
| Статус жизненного цикла | Активен | Активен |
| Наличие | In Stock | In Stock |
| Цена за единицу (USD) | $7,45 | $39,77 |
| Series | MAX II | — |
| Device Family | EPM240 | — |
| Macro Cells | 192 | — |
| User I/Os | 80 | — |
| Propagation Delay (tPD) Max | 4.7 ns | — |
| Internal Operating Frequency | 247.5 MHz | — |
| Supply Voltage - Core | 2.5 V / 3.3 V | — |
| I/O Standards Supported | 1.5 V, 1.8 V, 2.5 V, 3.3 V LVCMOS/LVTTL | — |
| User Flash Memory | 8 Kbit | — |
| Programmability | In-System Programmable via JTAG (IEEE 1149.1) | — |
| Configuration Memory | Non-volatile on-chip flash (instant-on) | On-chip non-volatile flash (instant-on) |
| Logic Family | CMOS | — |
| Корпус | 100-pin Micro FineLine BGA (MBGA), 6 x 6 mm, 0.5 mm pitch | 100-ball Micro FineLine BGA (MBGA), 6 mm × 6 mm, 0.5 mm pitch |
| Тип монтажа | Surface Mount (BGA) | Surface Mount |
| Рабочая температура | -40 C to +125 C (industrial) | -40 °C to +105 °C (industrial) |
| Статус RoHS | Lead Free (per DigiChip spec sheet) | — |
| Logic Array Blocks (LABs) | 4 (16 macrocells per LAB) | — |
| MultiTrack Interconnect | Yes | — |
| Hot Socketing | Yes | — |
| Family | — | MAX II |
| Logic Elements (LE) | — | 240 |
| Equivalent Macrocells | — | 192 |
| User I/O Pins | — | 80 |
| User Flash Memory (UFM) | — | 8 Kbits |
| Pin-to-Pin Delay (tPD1) | — | 4.7 ns |
| Maximum Operating Frequency | — | 300 MHz (internal) |
| Process Technology | — | 0.18 µm 6-layer-metal flash CMOS |
| Supply Voltage - Core (VCCINT) | — | 1.8 V |
| MultiVolt I/O (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5 V |
| RoHS / Lead-Free | — | Lead-free per package marking |
| Programming Interface | — | JTAG (IEEE 1149.1) ISP |