EPM5192AQC100-20 vs EPM5192AQC-2 Сравнение
Подробное сравнение бок о бок EPM5192AQC100-20 от Altera и EPM5192AQC-2 от Altera. Сравните ключевые характеристики, электрические параметры, упаковку, статус жизненного цикла, цены и наличие, чтобы выбрать лучший компонент для ваших требований.
Сравнение характеристик
| Параметр | EPM5192AQC100-20 | EPM5192AQC-2 |
|---|---|---|
| Бренд | Altera | Altera |
| Категория | FPGA & CPLD | FPGA & CPLD |
| Статус жизненного цикла | Obsolete | Obsolete |
| Наличие | In Stock | In Stock |
| Цена за единицу (USD) | $11,85 | $21,50 |
| Device Family | MAX 5000 | — |
| Product Type | Complex Programmable Logic Device (CPLD) | — |
| Macrocells | 192 | 192 |
| Maximum Operating Frequency | 66.7 MHz | — |
| Propagation Delay (tpd) | 33 ns | — |
| Корпус | 100-lead PQFP (R-PQFP-G100) | 100-pin PQFP (R-PQFP-G100) |
| Terminal Pitch | 0.65 mm | — |
| Process Technology | CMOS | CMOS |
| Programming Technology | UV-Erasable / One-Time-Programmable (OTP) | — |
| Напряжение питания | 5 V (typical, MAX 5000 family) | — |
| Диапазон рабочих температур | [DATA_NEEDED: operating temperature range] | — |
| I/O Count | [DATA_NEEDED: usable I/O count] | — |
| Logic Array Blocks | Multiple LABs (per MAX 5000 architecture) | — |
| Тип монтажа | Surface Mount (PQFP) | Surface Mount |
| Статус RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: confirmed compliance status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Уровень MSL | [DATA_NEEDED: MSL rating] | — |
| Device Type | — | UV-Erasable / OTP Complex PLD (CPLD) |
| Series | — | MAX 5000 (EPM5192) |
| User I/O Pins | — | 64 |
| Dedicated Inputs | — | 7 |
| Total Inputs | — | 72 |
| Propagation Delay (tPD) | — | 45 ns (-2 speed grade) |
| Максимальная тактовая частота | — | [DATA_NEEDED: max fMAX for -2 grade] |
| Switch Matrix | — | UV-Erasable / OTP (windowless on AQC package) |
| Lead Pitch | — | 0.635 mm |
| Terminal Form | — | Gull-wing |
| Рабочая температура | — | [DATA_NEEDED: commercial / industrial / military grade] |
| Programming Interface | — | JTAG (IEEE 1149.1) boundary scan |