EPM9320LI84-20N vs EPM9320LC84-20 Сравнение
Подробное сравнение бок о бок EPM9320LI84-20N от Altera и EPM9320LC84-20 от Altera. Сравните ключевые характеристики, электрические параметры, упаковку, статус жизненного цикла, цены и наличие, чтобы выбрать лучший компонент для ваших требований.
Сравнение характеристик
| Параметр | EPM9320LI84-20N | EPM9320LC84-20 |
|---|---|---|
| Бренд | Altera | Altera |
| Категория | FPGA & CPLD | FPGA & CPLD |
| Статус жизненного цикла | Obsolete | Obsolete |
| Наличие | In Stock | In Stock |
| Цена за единицу (USD) | $9,75 | $9,75 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD - Complex Programmable Logic Device |
| Macrocells | 320 | 320 |
| Usable Gates | 6,000 to 12,000 | — |
| User I/O Pins | 60 | — |
| Total Pins | 84 | — |
| Корпус | PLCC-84 (Plastic Leaded Chip Carrier, J-lead) | PLCC-84 (Plastic Leaded Chip Carrier) |
| Propagation Delay (tPD) | 20 ns (speed grade -20) | 16 ns |
| Pin-to-Pin Delay | 16 ns (per DigChip spec block) | — |
| Maximum Counter Frequency | 118 MHz | — |
| Logic Family | CMOS, EEPROM-based | CMOS (EEPROM-based) |
| Напряжение питания | 5.0 V | 5.0 V |
| Рабочая температура | 0 C to +70 C (commercial) | 0 C to 70 C |
| Programming Interface | IEEE 1149.1 JTAG, in-system programmable | — |
| Architecture | Multiple Array MatriX (MAX) - third generation | Multiple Array MatriX (MAX), 3rd generation |
| Process Technology | Advanced CMOS EEPROM | — |
| Статус RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| User I/Os | — | 60 |
| Pins | — | 84 |
| Internal Counter Frequency | — | 118 MHz |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| Dedicated Inputs | — | 4 (global clock / clear / OE) |
| PCI Compliance | — | PCI Local Bus Specification Rev. 2.2 |