EPM9320RI208-20 vs EPM9560RI208-10 Сравнение
Подробное сравнение бок о бок EPM9320RI208-20 от Intel и EPM9560RI208-10 от Intel. Сравните ключевые характеристики, электрические параметры, упаковку, статус жизненного цикла, цены и наличие, чтобы выбрать лучший компонент для ваших требований.
Сравнение характеристик
| Параметр | EPM9320RI208-20 | EPM9560RI208-10 |
|---|---|---|
| Бренд | Intel | Intel |
| Категория | FPGA & CPLD | FPGA & CPLD |
| Статус жизненного цикла | Obsolete | NRND |
| Наличие | In Stock | In Stock |
| Цена за единицу (USD) | $18,95 | $67,80 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 320 | 560 |
| Usable Gates | 6,000 | 12,000 |
| Propagation Delay (tPD) | 20 ns | — |
| Maximum Operating Frequency | 100 MHz | — |
| Supply Voltage (VCC) | 5.0 V | — |
| Logic Elements / LABs | 20 Logic Array Blocks (16 macro cells each) | — |
| Programmable Interconnect | Programmable Interconnect Array (PIA) | — |
| In-System Programmability | Yes - IEEE 1149.1 JTAG, 5.0-V ISP | — |
| Dedicated Input Pins | 4 (low-skew global) | — |
| User I/O Pins | [DATA_NEEDED: I/O pin count for 208-pin RQFP] | 212 (typical for 208-RQFP package) |
| Корпус | 208-pin RQFP (Power Quad Flat Pack) | 208-pin RQFP (Power Quad Flat Pack) |
| Operating Temperature Grade | Industrial | — |
| Technology | CMOS EEPROM | — |
| Тип монтажа | Surface Mount | Surface Mount |
| Уровень MSL | [DATA_NEEDED: MSL rating] | — |
| Статус RoHS | [DATA_NEEDED: RoHS compliance] | ROHS3 Compliant |
| Logic Array Blocks (LABs) | — | [DATA_NEEDED: LAB count] |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Counter Frequency | — | 144 MHz |
| Supply Voltage (VCCINT) | — | 5.0 V |
| Рабочая температура | — | -40 °C to +85 °C (Industrial) |
| Programming Interface | — | IEEE 1149.1 (JTAG) / ISP |
| Configuration Memory | — | EEPROM, 100 erase/program cycles |
| Уровень чувствительности к влаге (MSL) | — | 3 (168 Hours) |
| Lead Time | — | 1-7 days (per fpgalink listing) |