EPM9560RC208-10 vs EPM9560ARC208-10 Сравнение
Подробное сравнение бок о бок EPM9560RC208-10 от Intel и EPM9560ARC208-10 от Intel. Сравните ключевые характеристики, электрические параметры, упаковку, статус жизненного цикла, цены и наличие, чтобы выбрать лучший компонент для ваших требований.
Сравнение характеристик
| Параметр | EPM9560RC208-10 | EPM9560ARC208-10 |
|---|---|---|
| Бренд | Intel | Intel |
| Категория | FPGA & CPLD | FPGA & CPLD |
| Статус жизненного цикла | Obsolete | Obsolete |
| Наличие | In Stock | In Stock |
| Цена за единицу (USD) | $15,40 | $0,00 |
| Family | MAX 9000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 560 | 560 macrocells |
| Logic Array Blocks (LABs) | 16 | — |
| Maximum User I/O Pins | 212 (208-pin package variant) | — |
| Usable Gates | 12,000 | 12,000 gates |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Maximum Frequency (fMAX) | [DATA_NEEDED: internal toggle frequency in MHz] | — |
| Supply Voltage (VCCINT) | 5.0 V | — |
| I/O Standards Supported | 5.0 V TTL, 3.3 V LVTTL, 2.5 V (multiVolt I/O) | — |
| Configuration Memory | EEPROM (in-system programmable via JTAG) | — |
| Process Technology | 0.30 µm CMOS EEPROM | — |
| Рабочая температура | 0C to +70C (commercial) | 0 C to +70 C (commercial) |
| Корпус | 208-pin RQFP (Plastic Quad Flat Pack) | 208-pin RQFP (PowerQuad Flat Pack) with exposed pad |
| Тип монтажа | Surface Mount | Surface Mount |
| Lead-Free | [DATA_NEEDED: confirm lead-free status -10 suffix is conventional Pb-containing] | — |
| Статус RoHS | [DATA_NEEDED: not stated in retrieved distributor listings] | [DATA_NEEDED: RoHS status] |
| Programmability | JTAG (IEEE 1149.1) in-system programming | — |
| Device Family | — | MAX 9000A (Multiple Array MatriX) |
| Programmable Logic Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Array Blocks | — | 35 LABs |
| User I/O Pins | — | 153 I/O |
| Propagation Delay (tPD) | — | 10 ns (speed grade -10) |
| Internal Frequency | — | 144.9 MHz |
| Напряжение питания | — | 5.0 V |
| Logic Family | — | CMOS |
| Configuration Technology | — | EEPROM (non-volatile, in-system programmable) |
| JTAG Interface | — | IEEE 1149.1 boundary-scan (ISP) |
| Число выводов | — | 208 pins |