RTAX2000SL-1CGS624V vs RTAX2000SL-CGS624V Сравнение

Подробное сравнение бок о бок RTAX2000SL-1CGS624V от Microsemi и RTAX2000SL-CGS624V от Microchip Technology. Сравните ключевые характеристики, электрические параметры, упаковку, статус жизненного цикла, цены и наличие, чтобы выбрать лучший компонент для ваших требований.

Microsemi
RTAX2000SL-1CGS624V RTAX2000SL-1CGS624V - 2M-Gate Rad-Tolerant FPGA | Actel/Microchip

RTAX2000SL-1CGS624V - 2M-Gate Rad-Tolerant FPGA | Actel/Microchip

RTAX2000SL-1CGS624V ✓ Активен
Microchip Technology
RTAX2000SL-CGS624V RTAX2000SL-CGS624V - 2M-Gate Rad-Tolerant FPGA | Microchip

RTAX2000SL-CGS624V - 2M-Gate Rad-Tolerant FPGA | Microchip

RTAX2000SL-CGS624V ✓ Активен

Сравнение характеристик

Параметр RTAX2000SL-1CGS624V RTAX2000SL-CGS624V
Бренд Microsemi Microchip Technology
Категория FPGA & CPLD FPGA & CPLD
Статус жизненного цикла Активен Активен
Наличие In Stock In Stock
Цена за единицу (USD) $0,00 $6.500,00
Equivalent System Gates 2000000 2000000
Logic Cells (CLBs) 21504 21504
User I/Os (max, package dependent) Up to 684 —
Embedded Memory Up to 540 kbits with optional EDAC 540 kbits with optional EDAC protection
Total Ionizing Dose (TID) 300 krad (functional), 200 krad (parametric) 300 krad (Si) functional / 200 krad (Si) parametric
SEU Rate Less than 1E-10 errors per bit-day —
Technology Digital CMOS, antifuse nonvolatile CMOS antifuse (nonvolatile)
Корпус 624-ball ceramic CGA (CGS624) CG624 ceramic package
Speed Grade -1 [DATA_NEEDED: speed grade]
Quality / Screening Suffix S (space flow), V suffix qualification level —
Core Supply Voltage [DATA_NEEDED: core supply voltage] [DATA_NEEDED: core supply voltage]
I/O Supply Voltage [DATA_NEEDED: I/O supply voltage] [DATA_NEEDED: I/O supply voltage]
Configuration One-time programmable (OTP), live at power-up, single chip One-time programmable antifuse, live at power-up
Embedded SRAM Features Built-in FIFO control logic Built-in FIFO control logic
Clocking Segmentable clocks, chip-wide highway routing —
Рабочая температура [DATA_NEEDED: operating temperature range] [DATA_NEEDED: operating temperature range]
Тип монтажа Surface Mount —
User I/Os (maximum) — 684
Single-Event Upset Rate — Less than 1E-10 errors per bit-day
Clock Architecture — Segmentable clock structures
Routing — Chip-wide highway routing, carry logic
Family — RTAX-S/SL Radiation-Tolerant FPGA
Application Domain — Space-flight systems
System Frequency (typical) — [DATA_NEEDED: system frequency]

Даташиты & ресурсы

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