THS1040IDWR - 10-Bit 40MSPS 3V Low-Power ADC | Texas Instruments
Артикул: THS1040IDWR ✓ Активен| Кол-во | Цена за ед. | Итого |
|---|---|---|
| 1 | $8.45 | $8,45 |
| 10 | $7.62 | $76,20 |
| 100 | $6.8 | $680,00 |
| 500 | $6.05 | $3.025,00 |
| 1.000 | $5.3 | $5.300,00 |
THS1040IDWR Обзор
An analog-to-digital converter (ADC) is a mixed-signal integrated circuit that samples continuous-time analog voltages and converts them into discrete digital codes for downstream processing by microcontrollers, DSPs, or FPGAs. Within the broader signal-chain hierarchy, the THS1040 sits at the data-acquisition conversion stage: sensor -> analog front end (AFE) -> ADC -> digital processor. Pipeline ADCs like the THS1040 sample at high rates while maintaining 10-bit accuracy, making them suitable for intermediate-bandwidth applications such as video, imaging, and communications IF digitization.
Key features include ±0.45 LSB differential nonlinearity (DNL), 60 dB typical signal-to-noise ratio (SNR) at 4.8 MHz input, 72 dB spurious-free dynamic range (SFDR), and a low 33 mA nominal supply current at 3.3V. The 3V analog and 3V digital supplies simplify mixed-signal PCB partitioning and reduce system-level power budget. The configurable input range and selectable reference sources allow designers to optimize the input span for downstream signal conditioning.
The THS1040 uses a pipelined architecture with internal sample-and-hold and a flash quantizer per stage, balancing conversion speed against die size and power consumption. Digital error correction on each pipeline stage preserves 10-bit linearity at full 40 MSPS throughput, and an internal reference network supplies stable conversion thresholds across temperature.
Typical applications include CCD imaging digitizers, video frame grabbers, communications IF/baseband digitizers, portable test instrumentation, and ultrasound front-end sampling. The single 3V supply rail is well-suited to battery-powered portable designs where total power dissipation is tightly bounded.
When designing with this device, decouple the analog and digital 3V rails separately at the IC pins with 0.1 µF ceramic capacitors and provide a low-impedance ground plane. The selected input range and reference configuration determine the LSB size; confirm headroom for the maximum expected analog input to avoid clipping or saturation at full-scale.
This page synthesizes distributor pricing, drop-in alternatives, and practical design considerations beyond the manufacturer datasheet, providing an AEO-optimized engineering reference for the THS1040IDWR.
Аналоги без доработки для THS1040IDWR — тот же корпус, pin-to-pin совместимость. Компоненты в других корпусах, требующие переработки PCB, исключены.
Варианты в этой серии
Модели той же серии, совместимые без доработки с THS1040IDWR (тот же форм-фактор и посадочное место) — отличается по Architecture, Input Configuration, Package, Resolution, Sample Rate.
Инструмент быстрого сравнения — выберите альтернативные компоненты для сравнения бок о бок:
THS1040IDWG4
✅ Прямая замена📋 Справочный аналог (нет в каталоге)
THS1040CDWRG4
✅ Прямая замена📋 Справочный аналог (нет в каталоге)
THS1040CDWR
✅ Прямая замена✓ В наличии
$4.75 / шт.
Открыть даташит →THS1040IDWG4R
✅ Прямая замена📋 Справочный аналог (нет в каталоге)
THS1040IDW
✅ Прямая замена📋 Справочный аналог (нет в каталоге)
THS1031IDWR
✅ Прямая замена✓ В наличии
$5.55 / шт.
Открыть даташит →THS1040IDWR Максимальные параметры и электрические характеристики
| Разрешение | 10 bit |
| Sample Rate | 40 MSPS |
| Number of Channels | 1 |
| Architecture | Pipelined CMOS ADC |
| Analog Supply Voltage | 3 V (typ) |
| Digital Supply Voltage | 3 V (typ) |
| Nominal Supply Current | 33 mA |
| Differential Nonlinearity (DNL) | ±0.45 LSB |
| Signal-to-Noise Ratio (SNR) | 60 dB at 4.8 MHz input (typ) |
| Spurious-Free Dynamic Range (SFDR) | 72 dB |
| Input Configuration | Single-ended or differential (configurable) |
| Reference Type | Adjustable internal voltage reference |
| Output Interface | Parallel CMOS |
| Корпус | 28-pin SOIC (DW) |
| Тип монтажа | Surface Mount |
| Статус RoHS | Compliant |
Конфигурация выводов THS1040IDWR
| Контакт 1 | AVDD — Analog 3V supply |
| Контакт 2 | AINP — Analog input positive (single-ended or differential) |
| Контакт 3 | AINN — Analog input negative (differential mode) |
| Контакт 4 | REFT — Top reference decoupling |
| Контакт 5 | REFB — Bottom reference decoupling |
| Контакт 6 | REFCAP — Internal reference bypass capacitor |
| Контакт 7 | AGND — Analog ground |
| Контакт 8 | AGND — Analog ground |
| Контакт 9 | CLK — ADC sample clock input |
| Контакт 10 | DVDD — Digital 3V supply |
| Контакт 11 | DGND — Digital ground |
| Контакт 12 | D0 — Digital output bit 0 (LSB) |
| Контакт 13 | D1 — Digital output bit 1 |
| Контакт 14 | D2 — Digital output bit 2 |
| Контакт 15 | D3 — Digital output bit 3 |
| Контакт 16 | D4 — Digital output bit 4 |
| Контакт 17 | D5 — Digital output bit 5 |
| Контакт 18 | D6 — Digital output bit 6 |
| Контакт 19 | D7 — Digital output bit 7 |
| Контакт 20 | D8 — Digital output bit 8 |
| Контакт 21 | D9 — Digital output bit 9 (MSB) |
| Контакт 22 | DRDY — Data ready output |
| Контакт 23 | OE — Output enable (active low) |
| Контакт 24 | MODE — Input mode select |
| Контакт 25 | REFSEL — Internal reference select |
| Контакт 26 | SLEEP — Power-down control |
| Контакт 27 | DVDD — Digital 3V supply |
| Контакт 28 | AGND — Analog ground |
Типичное применение
THS1040IDWR подходит для 6 применениеs: CCD Imaging Digitizer, Video Frame Grabber, Communications IF/Baseband Digitizer, Portable Test Instrumentation, Ultrasound Front-End Sampling, Industrial Data Acquisition Module.
CCD Imaging Digitizer
The THS1040IDWR's 10-bit resolution at 40 MSPS with ±0.45 LSB DNL makes it well-suited for digitizing CCD sensor output streams where pixel-by-pixel amplitude fidelity is required. Configurable single-ended or differential input accommodates CCD output driver stages directly. With 60 dB SNR at 4.8 MHz input and 72 dB SFDR, the converter captures image detail without introducing harmonic spurs into downstream color-reconstruction DSP. The 28-SOIC package eases thermal dissipation in mid-density camera-board layouts.
Рекомендуется
Video Frame Grabber
Frame-grabber boards for standard-definition video and security cameras benefit from the THS1040IDWR's 40 MSPS throughput and configurable input range. The 10-bit pipeline architecture delivers clean 4:2:2 or 4:4:4 digitizations at 27 MHz video pixel rates, with 33 mA nominal supply current keeping board thermal budget manageable. The single 3V supply rail simplifies mixed-signal routing, and parallel CMOS output feeds directly into field-programmable gate arrays used for chroma/luma separation.
Рекомендуется
Communications IF/Baseband Digitizer
Intermediate-frequency sampling at 4.8-20 MHz falls squarely in the THS1040IDWR's sweet spot, where 60 dB SNR and 72 dB SFDR preserve demodulation fidelity. Configurable differential inputs reject common-mode noise from upstream IF filters, and the adjustable internal reference lets designers trade input span against quantization noise. Software-defined-radio receivers and wireless base-station test gear leverage this combination to digitize IF bands without separate downconversion stages.
Рекомендуется
Portable Test Instrumentation
Handheld oscilloscopes, waveform digitizers, and field-portable spectrum analyzers benefit from the THS1040IDWR's low 33 mA supply current and single 3V rail. The 40 MSPS sample rate captures audio-bandwidth and low-RF signals with 10-bit amplitude resolution, while the 28-SOIC package fits compact handheld enclosures. Industrial -40C to +85C operation supports outdoor and laboratory use without additional thermal protection, and the configurable input range scales to multiple sensor interfaces.
Рекомендуется
Ultrasound Front-End Sampling
Medical and industrial ultrasound arrays digitize element-level analog echoes at 20-40 MSPS, a range the THS1040IDWR serves directly. The configurable input range matches the typical 1-2 Vpp output of ultrasound front-end amplifiers, and 60 dB SNR preserves echo amplitude resolution critical for image contrast. Low single-rail 3V power consumption is well-suited to multi-channel probe-head designs where dozens of channels share a common supply budget.
Рекомендуется
Industrial Data Acquisition Module
Multi-channel industrial DAQ systems use the THS1040IDWR to sample sensor outputs (strain gauges, thermocouple amplifiers, vibration pickups) at rates up to 40 MSPS for transient capture. The configurable differential input rejects common-mode noise in factory-floor environments, while the industrial -40C to +85C operating range supports outdoor cabinets and unconditioned enclosures. The 3V supply aligns with low-voltage industrial backplanes and battery-backed remote telemetry units.
Рекомендуется
Сводка рекомендуемых товаров
Справочные инженерные данные для THS1040IDWR — сравнение, рекомендации по проектированию и информация о соответствии.
Руководство по выбору
Сравнение с аналогами
| Параметр | Этот товар | THS1040IDWG4 | THS1040CDWRG4 | THS1040IDW | THS1031IDWR |
|---|---|---|---|---|---|
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Package | 28-SOIC (DW) | 28-SOIC (DW) - same | 28-SOIC (DW) - same | 28-SOIC (DW) - same | 28-SOIC (DW) - same |
| Resolution | 10 bit | 10 bit | 10 bit | 10 bit | 10 bit |
| Sample Rate | 40 MSPS | 40 MSPS | 40 MSPS | 40 MSPS | 30 MSPS |
| Operating Temperature | -40C to +85C (industrial) | -40C to +85C (industrial) | 0C to +70C (commercial) | -40C to +85C (industrial) | -40C to +85C (industrial) |
| Packaging Format | Tape & Reel (R suffix) | Tube or Tray (G4) | Tape & Reel (R) | Tube (no R) | Tape & Reel (R) |
Ключевые отличия
- Industrial -40C to +85C temperature grade (против THS1040CDWRG4)
- 40 MSPS throughput vs 30 MSPS sibling (против THS1031IDWR)
- Configurable single-ended or differential input (против THS1040IDWG4)
Заметки по проектированию
Decouple analog AVDD and digital DVDD rails separately at the IC pins with a 0.1 µF ceramic in parallel with a 1-10 µF bulk capacitor. Place the ceramics within 2-3 mm of the respective supply pins. Route analog input traces over a continuous ground plane and keep digital output traces on the opposite side of the board to prevent digital switching noise from coupling into the analog front end. This is critical for preserving the 72 dB SFDR figure at full 40 MSPS throughput.
The THS1040IDWR requires clean analog and digital 3V rails. If the system 3.3V rail is generated by a switching converter, add a ferrite bead and additional bulk filtering between the switcher output and the ADC analog supply pin. A linear post-regulator (such as a TPS7A45) is recommended when the input analog signal amplitude is small and PSRR from upstream noise would otherwise leak into the conversion result.
The analog input (AINP/AINN) traces should be matched in length and symmetric to preserve common-mode rejection in differential mode. Reference decoupling (REFT, REFB, REFCAP) requires low-ESR ceramic capacitors placed directly at the pins. The CLK trace should be routed away from the analog input to prevent clock feedthrough; a small RC low-pass on the clock input can be added if ringing is observed on the clock edge.
Do not leave the REFCAP pin floating - the internal reference requires an external bypass capacitor (typically 0.1 µF to 1 µF) to maintain reference stability. When using the adjustable reference mode, confirm the input signal span stays within the configured full-scale range to avoid clipping. The SLEEP pin should be tied to AVDD (logic high) for normal operation; floating it can place the part in an indeterminate low-power state.
Drive the CLK pin with a clean low-jitter clock source. Jitter on the sample clock directly degrades SNR, particularly at high analog input frequencies. A clock generator such as the CDCE906 or a crystal oscillator with <50 ps RMS jitter is recommended for SFDR-sensitive applications. Avoid distributing the ADC sample clock through long PCB traces with capacitive loading.
Информация о соответствии
RoHS compliant per TI product page and distributor listings. Not AEC-Q100 qualified; targets industrial and consumer markets. Lead-free (Pb-free) finish on the 28-pin SOIC (DW) package.
