THS1041IPWRG4 - 10-Bit 40 MSPS Low-Power ADC | TI 28-TSSOP
Артикул: THS1041IPWRG4 ✗ Снят с производства| Кол-во | Цена за ед. | Итого |
|---|---|---|
| 1 | $8.42 | $8,42 |
| 10 | $7.55 | $75,50 |
| 100 | $6.34 | $634,00 |
| 500 | $5.12 | $2.560,00 |
| 1.000 | $4.27 | $4.270,00 |
THS1041IPWRG4 Обзор
An ADC is a mixed-signal integrated circuit that converts real-world analog signals into digital codes for downstream processing. The THS1041 sits in the converter hierarchy as: ADC -> data converter -> data acquisition IC -> mixed-signal/analog front-end. It uses a pipelined architecture with a sample-and-hold front-end, enabling high throughput while keeping power consumption low (~55.5 mW at 3 V) for portable or thermally constrained designs.
Key features include single 3 V supply operation, configurable analog input functions (single-ended, single-ended with analog clamp, single-ended with programmable digital clamp, differential), a built-in PGA with adjustable gain, parallel CMOS-compatible data interface, low-power standby mode, and an operating temperature range of -40 C to +85 C. The part supports one analog input channel sampled at up to 40 MSPS.
The architecture combines S/H + PGA + ADC blocks in a 1:1 ratio, with the internal 1.2 V precision bandgap reference setting the full-scale range and offering a buffered reference output for designs needing an external reference. This integration reduces external component count and PCB area compared to discrete ADC + external PGA implementations.
Typical applications include portable imaging devices, digital video, set-top box digitizers, industrial inspection cameras, low-cost digital oscilloscopes, and general-purpose data-acquisition front ends. The integrated clamp and PGA simplify interface to direct-coupled video or sensor outputs.
When designing with this part, note that it is now obsolete/NRND at TI; verify last-time-buy windows and lifecycle status before committing new designs. Use the standby pin for power cycling in battery systems, and respect the analog/digital supply decoupling guidance in the datasheet.
This page synthesizes distributor pricing, lifecycle observations, and engineering notes from the TI datasheet into a single source intended to support sourcing, replacement analysis, and front-end design decisions for this ADC.
Аналоги без доработки для THS1041IPWRG4 — тот же корпус, pin-to-pin совместимость. Компоненты в других корпусах, требующие переработки PCB, исключены.
Варианты в этой серии
Модели той же серии, совместимые без доработки с THS1041IPWRG4 (тот же форм-фактор и посадочное место) — отличается по Package.
Инструмент быстрого сравнения — выберите альтернативные компоненты для сравнения бок о бок:
THS1041CPWRG4
✅ Прямая замена📋 Справочный аналог (нет в каталоге)
THS1041CPWR
✅ Прямая замена📋 Справочный аналог (нет в каталоге)
THS1041IPW
✅ Прямая замена📋 Справочный аналог (нет в каталоге)
THS1040IPWR
✅ Прямая замена📋 Справочный аналог (нет в каталоге)
THS1040CPWRG4
✅ Прямая замена✓ В наличии
$4.1 / шт.
Открыть даташит →THS1041IPWRG4 Максимальные параметры и электрические характеристики
| Разрешение | 10 bit |
| Частота дискретизации | 40 MSPS |
| Number of Inputs | 1 |
| Input Type | Differential, Single-Ended |
| Data Interface | Parallel |
| Configuration | S/H-PGA-ADC |
| Architecture | Pipelined |
| Ratio S/H:ADC | 1:1 |
| Number of A/D Converters | 1 |
| Analog Supply Voltage | 3 V |
| Digital Supply Voltage | 3 V |
| Power Consumption | 55.5 mW (typical at 3 V) |
| Input Functions | Single-ended / Clamped / Differential |
| Integrated PGA | Yes (programmable gain) |
| Internal Reference | 1.2 V precision bandgap (buffered output) |
| Рабочая температура | -40 C to +85 C |
| Корпус | 28-TSSOP (PW), 4.40 mm body width |
| Тип монтажа | Surface Mount |
| Lead-Free / RoHS | Lead-Free finish (G4 suffix), RoHS compliant |
Конфигурация выводов THS1041IPWRG4
| Контакт 1 | AVDD — Analog supply voltage (3 V) |
| Контакт 2 | AIN — Analog input |
| Контакт 3 | AIN_COM — Analog input common / clamp reference |
| Контакт 4 | CLAMP — Analog clamp input |
| Контакт 5 | REFT — Reference top decoupling |
| Контакт 6 | REFB — Reference bottom decoupling |
| Контакт 7 | REFOUT — Buffered internal 1.2 V reference output |
| Контакт 8 | AGND — Analog ground |
| Контакт 9 | DVDD — Digital supply voltage (3 V) |
| Контакт 10 | DGND — Digital ground |
| Контакт 11 | CLK — External clock input |
| Контакт 12 | STBY — Standby mode control (active high) |
| Контакт 13 | D0 — Parallel data output bit 0 (LSB) |
| Контакт 14 | D1 — Parallel data output bit 1 |
| Контакт 15 | D2 — Parallel data output bit 2 |
| Контакт 16 | D3 — Parallel data output bit 3 |
| Контакт 17 | D4 — Parallel data output bit 4 |
| Контакт 18 | D5 — Parallel data output bit 5 |
| Контакт 19 | D6 — Parallel data output bit 6 |
| Контакт 20 | D7 — Parallel data output bit 7 |
| Контакт 21 | D8 — Parallel data output bit 8 |
| Контакт 22 | D9 — Parallel data output bit 9 (MSB) |
| Контакт 23 | OTR — Out-of-range indicator |
| Контакт 24 | PGA0 — PGA gain setting input 0 |
| Контакт 25 | PGA1 — PGA gain setting input 1 |
| Контакт 26 | MODE — Input mode select (SE / clamp / differential) |
| Контакт 27 | AVDD — Analog supply (duplicate pin for low inductance) |
| Контакт 28 | DVDD — Digital supply (duplicate pin for low inductance) |
Типичное применение
THS1041IPWRG4 подходит для 6 применениеs: Portable Imaging Digitizer, Set-Top Box Video Capture, Low-Cost Digital Oscilloscope Front End, Industrial Inspection Camera Interface, General-Purpose Data Acquisition Front End, Ultrasound / Medical Imaging Signal Path.
Portable Imaging Digitizer
The THS1041IPWRG4 suits portable imaging digitizers that need 10-bit pixel resolution at video frame rates up to 40 MSPS. Its integrated PGA amplifies small CCD/CIS sensor outputs directly into the ADC's full-scale range, while the on-chip analog clamp restores DC level for AC-coupled video sources - eliminating an external op-amp and clamp diode. At 55.5 mW typical power from 3 V, it fits battery-powered handheld camera designs without active cooling. Pin-compatible migration to the THS1040 family is straightforward if higher sample rates become necessary.
Рекомендуется
Set-Top Box Video Capture
In set-top box and digital-TV downstream designs, the THS1041IPWRG4 digitizes composite or component video streams at up to 40 MSPS with 10-bit resolution - sufficient for standard-definition MPEG-2 capture and modest oversampling of EDTV signals. The configurable single-ended input with programmable digital clamp simplifies sync-tip clamping for composite video. The 28-TSSOP footprint integrates easily onto video capture daughter cards alongside an MPEG decoder. Industrial grade temperature rating supports set-top box internal thermal envelopes.
Рекомендуется
Low-Cost Digital Oscilloscope Front End
The THS1041IPWRG4 serves as a cost-effective single-channel digitizer for entry-level digital oscilloscopes and bench DMMs sampling at 40 MSPS. Its integrated PGA with programmable gain replaces an external attenuator/amplifier stage, while the differential input mode supports floating measurements with proper biasing. The 1.2 V internal reference is buffered for use by adjacent circuitry. Designers can stack multiple THS1041 channels for simultaneous multi-channel acquisition if the 28-TSSOP footprint is acceptable on each acquisition card.
Рекомендуется
Industrial Inspection Camera Interface
The THS1041IPWRG4 interfaces to line-scan or area-scan industrial cameras in machine-vision inspection systems. Its 10-bit resolution captures grayscale intensity with adequate dynamic range for defect detection on assembly lines, and the 40 MSPS sample rate handles standard VGA-rate sensor outputs. The -40 C to +85 C industrial temperature rating supports factory-floor enclosures without derating. The integrated clamp accommodates AC-coupled sensor outputs directly, minimizing analog front-end complexity on the vision processor card.
Рекомендуется
General-Purpose Data Acquisition Front End
The THS1041IPWRG4 is a compact ADC for general-purpose data-acquisition boards measuring analog signals from transducers, sensors, or process-control outputs. Single 3 V supply operation simplifies power-tree design, while the parallel data interface allows direct connection to FPGAs or microcontrollers without a serial-deserializer stage. The integrated PGA adapts low-amplitude sensor outputs (e.g., thermocouples after pre-amplification) to the ADC's input range. The 28-TSSOP package is friendly to 4-layer mixed-signal PCBs with proper grounding.
Рекомендуется
Ultrasound / Medical Imaging Signal Path
In low-end ultrasound or medical imaging front ends, the THS1041IPWRG4 digitizes pre-amplified transducer return signals at 40 MSPS with 10-bit resolution. The integrated PGA gain stage is sized for typical TGC (time-gain-compensation) outputs, and the differential input mode supports pseudo-differential transducer interfaces for common-mode rejection. Industrial temperature rating supports medical equipment enclosures. Designers should verify EMI/EMC compliance of the chosen 28-TSSOP layout against medical device standards during qualification.
Рекомендуется
Сводка рекомендуемых товаров
Справочные инженерные данные для THS1041IPWRG4 — сравнение, рекомендации по проектированию и информация о соответствии.
Руководство по выбору
Сравнение с аналогами
| Параметр | Этот товар | THS1041CPWRG4 | THS1041CPWR | THS1041IPW | THS1040IPWR | THS1040CPWRG4 |
|---|---|---|---|---|---|---|
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Package | 28-TSSOP (PW) | 28-TSSOP (PW) - same | 28-TSSOP (PW) - same | 28-TSSOP (PW) - same | 28-TSSOP (PW) - same | 28-TSSOP (PW) - same |
| Resolution | 10 bit | 10 bit | 10 bit | 10 bit | 10 bit | 10 bit |
| Sampling Rate | 40 MSPS | 40 MSPS | 40 MSPS | 40 MSPS | Higher than 40 MSPS (THS1040 family) | Higher than 40 MSPS (THS1040 family) |
| Temperature Grade | Industrial (-40 C to +85 C) | Commercial (0 C to +70 C) | Commercial (0 C to +70 C) | Industrial (-40 C to +85 C) | Industrial (-40 C to +85 C) | Commercial (0 C to +70 C) |
| Lead Finish | Lead-free (G4) | Lead-free (G4) | Standard (non-G4) | Standard (non-G4) | Standard (non-G4) | Lead-free (G4) |
| Integrated PGA | Yes | Yes | Yes | Yes | Yes | Yes |
| Supply Voltage | 3 V | 3 V | 3 V | 3 V | 3 V | 3 V |
| Pin Count | 28 | 28 | 28 | 28 | 28 | 28 |
Ключевые отличия
- Industrial temperature range with lead-free finish (против THS1041CPWRG4)
- Drop-in upgrade path to higher-speed family (против THS1040IPWR)
- Integrated PGA and analog clamp reduce external BOM (против Discrete ADC + external PGA (e.g., MAX197 + AD602))
Заметки по проектированию
Estimated: at 3.0 V analog and digital supply and 40 MSPS continuous sampling, the THS1041IPWRG4 draws roughly 18.5 mA (55.5 mW total). Decouple AVDD and DVDD with a 0.1 uF ceramic capacitor placed within 3 mm of each supply pin, plus a 10 uF bulk capacitor on each rail. The 28-TSSOP has duplicate supply pins (1/27 for AVDD, 9/28 for DVDD) - tie both to the same rail via independent vias to minimize supply inductance.
Use a four-layer PCB with a continuous ground plane beneath the ADC. Keep analog input traces short and guarded with ground on both sides. Separate the analog (AVDD/AGND) and digital (DVDD/DGND) ground returns and join them at a single point near the ADC's AGND pin. Place the REFT and REFB decoupling capacitors (pins 5 and 6) directly at the pins with short traces to the adjacent ground via to limit reference noise injection into the conversion result.
Route the external CLK input (pin 11) as a 50-ohm controlled-impedance trace, terminated at the source. Keep the clock trace away from the analog input and reference pins to avoid coupling. The parallel data outputs D0-D9 should be impedance-matched and length-matched within ~2 mm if they fan out to an FPGA at 40 MHz, to limit skew on the captured byte. Add 22 ohm series damping resistors near the ADC outputs if the bus is long or heavily loaded.
Do not leave STBY (pin 12) floating - tie it to DGND through a 10 kohm resistor for normal operation, or drive it high to enter standby mode. Selecting the wrong MODE setting (pin 26) leaves the analog clamp inactive and may damage the ADC on AC-coupled video inputs that swing beyond the supply rails. When the part is obsolete, double-check the active silicon revision against the latest TI datasheet before committing to a last-time-buy order, since later revisions occasionally shift reference behavior.
Информация о соответствии
G4 suffix indicates lead-free (Pb-free) finish and RoHS compliance per TI product marking. AEC-Q100 not applicable - this is a converter IC, not an automotive-qualified part. Halogen-free status not explicitly listed in the verified web data; halogen-free marking, if present, is on the device label.
