10AS032E4F27I3LG vs 10AS032E4F27E3SG Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 10AS032E4F27I3LG sa pamamagitan ng Intel at 10AS032E4F27E3SG sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
10AS032E4F27E3SG - Arria 10 SX SoC FPGA 320K LE | Altera (Intel)
10AS032E4F27E3SG ✓ NakahandaPagsanggunian na paghahambing
| Parametro | 10AS032E4F27I3LG | 10AS032E4F27E3SG |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | Arria 10 SX SoC FPGA | Arria 10 SX SoC FPGA |
| Logic Elements | 320,000 | 320,000 |
| Hard Processor Subsystem (HPS) | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| HPS Clock Frequency | 1.5 GHz | — |
| Speed Grade | E4 (-4, mid-tier) | E4 (commercial) |
| Temperature Grade | Industrial (-40C to +100C) | — |
| Packhaging | 672-pin FCBGA (F27, 27x27 mm) | 672-FBGA, FC (27x27 mm) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | Compliant | Compliant |
| Lead-Free | Yes | Yes |
| Level ng MSL | [DATA_NEEDED: MSL rating per JEDEC J-STD-020] | 3 |
| Process Technology | 20 nm | 20 nm |
| Transceivers | Up to 24 channels, up to 14.1 Gbps (family-level) | — |
| DSP Blocks | Hardened floating-point DSP (family-level) | — |
| Memory Interfaces | DDR3 / DDR4 with hard controllers (family-level) | — |
| Configuration Method | JTAG, ASx4, FPP (family-level) | — |
| Core Voltage | — | 0.9 V |
| Bilang ng Pin | — | 672 |
| Temperature na Operasyon | — | 0C to +100C (commercial) |
| Hard Processor System | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Maximum Frequency | — | 1.5 GHz |
| Package Type | — | FC-FBGA (flip-chip fine-pitch BGA) |