10AS032H2F35I2LG vs 10AS032H3F35I2LG Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 10AS032H2F35I2LG sa pamamagitan ng Altera at 10AS032H3F35I2LG sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | 10AS032H2F35I2LG | 10AS032H3F35I2LG |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | Arria 10 SX | Arria 10 SX |
| Device Variant | 10AS032 (320K Logic Elements) | 10AS032 |
| Architecture | SoC FPGA (FPGA + Hard Processor System) | — |
| Processor Core | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Logic Elements | 320 K | 320,000 |
| Maximum Logic Performance | 1.5 GHz | — |
| Packhaging | 1152-FBGA, FC (Flip-Chip), 35x35 mm (F35) | 1152-FCBGA (35 x 35 mm) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Operating Temperature Grade | Industrial (I2 suffix) | Industrial (-40C to +100C) |
| Tindminan RoHS | Compliant | Compliant |
| Lead Free | Yes | Yes |
| Level ng MSL | [DATA_NEEDED: MSL Level] | [DATA_NEEDED: MSL level] |
| Number of Terminals | 1152 (Ball) | — |
| Terminal Form | Ball | — |
| Package Code | BGA (FCBGA) | — |
| Process Technology | [DATA_NEEDED: Process Node] | 20 nm (TSMC) |
| Hard Processor Subsystem | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| Maximum CPU Clock | — | 1.5 GHz |
| Memory Interfaces | — | DDR3 / DDR4 external memory interfaces |
| DSP Blocks | — | Yes (variable-precision DSP blocks) |
| Transceivers | — | Multi-gigabit transceivers (up to 12.5 Gbps per grade) |
| Configuration Memory | — | On-chip configuration |
| Hard Memory Controller | — | Yes (HPS-side) |