10AS048H2F34E1HG vs 10AS048H2F34E2SG Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 10AS048H2F34E1HG sa pamamagitan ng Altera at 10AS048H2F34E2SG sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
10AS048H2F34E1HG - Arria 10 SX SoC FPGA, 480K LE, 1.5 GHz | Altera
10AS048H2F34E1HG ✓ NakahandaIntel
10AS048H2F34E2SG - Arria 10 SX 480K SoC FPGA | Intel (Altera) | FCBGA-1152
10AS048H2F34E2SG ✓ NakahandaPagsanggunian na paghahambing
| Parametro | 10AS048H2F34E1HG | 10AS048H2F34E2SG |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | Arria 10 SX SoC FPGA | Arria 10 SX |
| Logic Elements | 480K | 480,000 |
| Hard Processor System | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| HPS Maximum Frequency | 1.5 GHz | — |
| Packhaging | 1152-ball FCBGA (F34), 35x35 mm | 1152-ball FCBGA (35 x 35 mm) |
| Speed Grade | H2 | — |
| Transceivers | Multi-gigabit (14.1 Gbps-capable, family-level) | [DATA_NEEDED: transceiver count and data rate] |
| DSP Blocks | Variable-precision DSP (family-level) | — |
| On-chip Memory | M20K blocks plus MLAB (family-level) | — |
| Memory Interface | DDR3/DDR4 hard memory controllers (family-level) | — |
| PCIe Hard IP | Gen2/Gen3 capable (family-level) | — |
| Temperature na Operasyon | Extended (per OPN E1 suffix, family-level) | 0C to 100C (extended) |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Tindminan RoHS | Compliant (per distributor listing) | Compliant |
| Configuration Device | Supported (family-level, external or internal) | — |
| Process Technology | — | 20 nm |
| Core Voltage | — | 0.9 V |
| Embedded Processor | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| Device Type | — | SoC FPGA (System On Chip) |
| Package Code | — | F-BGA / PBGA1152 |
| Terminal Form | — | Ball |
| Terminal Pitch | — | [DATA_NEEDED: pitch value] |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |