10AS048H2F34E2LG vs 10AS032H4F34I3SG Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 10AS048H2F34E2LG sa pamamagitan ng Intel at 10AS032H4F34I3SG sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
10AS048H2F34E2LG - Arria 10 SX 480K SoC FPGA, Dual A9, 1152-FBGA | Intel
10AS048H2F34E2LG ✓ Nakahanda
Pagsanggunian na paghahambing
| Parametro | 10AS048H2F34E2LG | 10AS032H4F34I3SG |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | Arria 10 SX | Arria 10 SX SoC FPGA |
| Logic Elements | 480000 | 320000 |
| Process Technology | 20 nm | 20 nm |
| Core Voltage | 0.9 V | 0.9 V |
| Hard Processor System | Dual ARM Cortex-A9 MPCore with CoreSight | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Maximum Frequency | 1.5 GHz | 1.5 GHz |
| Packhaging | 1152-ball FC-FBGA (F34), 35 x 35 mm | FCBGA-1152 (F34, 35 x 35 mm) |
| Uri ng Pagpapasok | Surface Mount (flip-chip BGA) | Surface Mount (BGA ball grid) |
| Operating Temperature Grade | Industrial / Medical (per OPN code H2) | — |
| Logic Family | Arria 10 SoC FPGA | — |
| Adaptive Logic Modules | [DATA_NEEDED: ALM count] | — |
| DSP Blocks | [DATA_NEEDED: variable-precision DSP block count] | [DATA_NEEDED: DSP block count] |
| Embedded Memory (M20K) | [DATA_NEEDED: Mbits] | — |
| Transceivers | [DATA_NEEDED: number / data rate] | — |
| User I/O Banks | [DATA_NEEDED: bank count and total user I/O] | — |
| Tindminan RoHS | Compliant | Compliant |
| Level ng MSL | 3 (per FBGA package) | — |
| Bilang ng Pin | — | 1152 |
| Package Code | — | F34 |
| Speed Grade | — | H4 |
| Temperature Grade | — | Industrial (I) |
| Embedded Memory | — | [DATA_NEEDED: embedded memory Mbits] |
| Transceiver Count | — | [DATA_NEEDED: transceiver count and rate] |
| PCIe Hard IP | — | [DATA_NEEDED: PCIe hard IP generation/lane count] |