10AS066K2F35E1HG vs 10AS066K2F35I2SG Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 10AS066K2F35E1HG sa pamamagitan ng Altera at 10AS066K2F35I2SG sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
10AS066K2F35E1HG - Arria 10 SX SoC FPGA, 660K LE, 1152-FBGA | Altera
10AS066K2F35E1HG ✓ NakahandaPagsanggunian na paghahambing
| Parametro | 10AS066K2F35E1HG | 10AS066K2F35I2SG |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | Arria 10 SX SoC FPGA | — |
| Logic Elements | 660,000 (660K) | 660,000 |
| Hard Processor Subsystem (HPS) | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| HPS Maximum Clock Frequency | 1.5 GHz | — |
| Packhaging | 1152-FBGA, FC (35x35 mm) | 1152-ball FCBGA (35x35 mm) |
| Process Node | 20 nm | 20 nm TSMC |
| Speed Grade | -1 (industrial) | 2 (mid-tier) |
| Temperature Grade | E (extended) | Industrial (-40C to +100C) |
| Transceivers | Up to 17.4 Gbps (multi-gigabit) | [DATA_NEEDED: transceiver count] |
| DSP Blocks | Variable-precision, hardened floating-point | [DATA_NEEDED: DSP block count] |
| Memory Interfaces | Hardened DDR3/DDR4 controllers | — |
| PCIe Hard IP | PCI Express Gen3 hard IP blocks | — |
| Tindminan RoHS | Compliant | Compliant |
| Uri ng Pagpapasok | Surface Mount (FCBGA) | Surface Mount |
| Lead-Free | Yes | — |
| Product Family | — | Arria 10 SX SoC FPGA |
| Hard Processor System | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| Maximum Core Clock | — | 1.5 GHz |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |
| Logic Array Blocks (LABs) | — | [DATA_NEEDED: LAB count] |
| Embedded Memory (M20K) | — | [DATA_NEEDED: M20K count] |
| GPIO | — | 396 user I/O |
| Device Variant | — | 10AS066K2F35 |