10AX090U2F45I1SG vs 10AX090U2F45E1SG Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 10AX090U2F45I1SG sa pamamagitan ng Intel at 10AX090U2F45E1SG sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | 10AX090U2F45I1SG | 10AX090U2F45E1SG |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Series | Arria 10 GX | — |
| Logic Elements | 900,000 | 900,000 |
| Embedded Memory Bits | 59,234,304 bits | — |
| User I/Os | 480 | — |
| Packhaging | 1932-BBGA, FCBGA (45 mm x 45 mm) | 1932-BBGA, FCBGA |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Temperature na Operasyon | -40C to +100C (Industrial) | — |
| Temperature Grade | I (Industrial) | — |
| Speed Grade | U2 | — |
| Process Technology | 20 nm Tri-Gate | 20 nm |
| Tindminan RoHS | Compliant | — |
| RoHS Version | SG suffix indicates RoHS-compliant | — |
| Transceivers | Up to 24 transceiver channels (family-level, [DATA_NEEDED: per-channel data rate confirmation]) | — |
| DSP Blocks | Variable-precision DSP blocks (family-level, [DATA_NEEDED: exact count for 10AX090]) | [DATA_NEEDED: DSP block count] |
| Hard Memory Controllers | Yes (DDR3/DDR4 with ECC, family-level) | — |
| Family | — | Arria 10 GX |
| Adaptive Logic Modules (ALMs) | — | [DATA_NEEDED: ALM count] |
| Embedded Memory | — | 59,234,304 bits (~28.05 Mbit) |
| User I/O Pins | — | 480 |
| Transceiver Channels | — | Up to 24 |
| Max Transceiver Data Rate | — | 17.4 Gbps (chip-to-chip) |
| Core Voltage | — | 0.9 V |
| Package Code | — | F45 (45x45 mm) |
| Operating Temperature Grade | — | Industrial (E1) |
| Hard IP | — | PCIe Gen3, memory controllers |