10AX090U2F45I2SG vs 10AX090U2F45E1SG Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 10AX090U2F45I2SG sa pamamagitan ng Intel at 10AX090U2F45E1SG sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | 10AX090U2F45I2SG | 10AX090U2F45E1SG |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | Arria 10 GX | Arria 10 GX |
| Logic Elements | 900,000 | 900,000 |
| Embedded Memory (bits) | 59,234,304 | — |
| User I/O Count | 480 | — |
| Transceivers | 24 channels | — |
| Max Transceiver Data Rate | 14.1 Gbps | 17.4 Gbps (chip-to-chip) |
| Process Technology | 20 nm | 20 nm |
| Core Voltage | 0.9 V | 0.9 V |
| DSP Blocks | 18x19 multipliers | [DATA_NEEDED: DSP block count] |
| Packhaging | 1932-BBGA, FCBGA | 1932-BBGA, FCBGA |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Operating Temperature Grade | Industrial (-40C to +100C) | Industrial (E1) |
| Level ng MSL | 3 (168 hours) | — |
| Configuration | AES-256 encrypted bitstream support | — |
| Tindminan RoHS | Compliant | — |
| Hard IP | PCIe Gen3 x8, DDR4 memory controller | PCIe Gen3, memory controllers |
| Speed Grade | 2 (medium) | — |
| Adaptive Logic Modules (ALMs) | — | [DATA_NEEDED: ALM count] |
| Embedded Memory | — | 59,234,304 bits (~28.05 Mbit) |
| User I/O Pins | — | 480 |
| Transceiver Channels | — | Up to 24 |
| Package Code | — | F45 (45x45 mm) |