10AX115N2F40E1SG vs 10AX115N2F45E1SG Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 10AX115N2F40E1SG sa pamamagitan ng Intel at 10AX115N2F45E1SG sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
10AX115N2F45E1SG - Arria 10 GX 1150K LE FPGA, 1932-FCBGA | Altera
10AX115N2F45E1SG ✓ NakahandaPagsanggunian na paghahambing
| Parametro | 10AX115N2F40E1SG | 10AX115N2F45E1SG |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | Arria 10 GX | Arria 10 GX |
| Logic Elements (LE) | 1,150,000 | — |
| Adaptive Logic Modules (ALM) | [DATA_NEEDED: ALM count] | — |
| Embedded Memory Bits | 68,857,600 | — |
| Embedded Memory Blocks (M20K) | [DATA_NEEDED: M20K count] | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | — |
| Maximum User I/O Pins | 600 | — |
| Transceiver Count | [DATA_NEEDED: transceiver count] | — |
| Maximum Transceiver Data Rate | 17.4 Gbps (chip-to-chip) | — |
| Hard PCIe IP Blocks | PCIe Gen3 | — |
| Process Technology | 20 nm | 20 nm |
| Core Voltage | 0.9 V | 0.9 V |
| Packhaging | 1517-BBGA, FCBGA (F40) | 1932-BBGA, FC-FBGA (F45) |
| Package Dimensions | 40 mm x 40 mm | — |
| Ball Pitch | 1.0 mm | — |
| Speed Grade | N2 | — |
| Temperature Grade | E1 (commercial) | — |
| Temperature ng Junction na Operasyon | -40C to +100C | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (FCBGA) |
| Tindminan RoHS | Compliant | Compliant |
| Device Variant | — | 10AX115 (1150K Logic Elements) |
| Logic Elements | — | 1,150,000 |
| Embedded Memory | — | 68,857,640 bits (68.86 Mbit) |
| User I/O Count | — | 768 |
| Transceivers | — | Up to 24 channels, 14.1 Gbps |
| Bilang ng Pin | — | 1932 |
| Temperature na Operasyon | — | -40C to +100C (industrial) |
| Hard Memory Controllers | — | Yes |
| Hard PCIe Gen3 | — | Yes |
| Configuration | — | Partial reconfiguration supported |