10AX115N3F45I2SG vs 10AX115N4F40I3SG Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 10AX115N3F45I2SG sa pamamagitan ng Intel at 10AX115N4F40I3SG sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
10AX115N3F45I2SG - Arria 10 GX 1.15M LE FPGA | Intel | 1932-FCBGA
10AX115N3F45I2SG ✓ NakahandaIntel
10AX115N4F40I3SG - Arria 10 GX 1150K LE FPGA | Intel | 1517-FCBGA
10AX115N4F40I3SG ✓ NakahandaPagsanggunian na paghahambing
| Parametro | 10AX115N3F45I2SG | 10AX115N4F40I3SG |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | Arria 10 GX | Arria 10 GX |
| Logic Elements | 1,150,000 | — |
| Embedded Memory Bits | 68,857,856 | 68,857,856 |
| User I/Os | 768 | — |
| Number of Logic Blocks/Cells | 1,150,000 | — |
| Total RAM Bits | 68,857,856 | — |
| Supply Voltage Core | 0.85 V to 0.95 V | — |
| Process Technology | 20 nm | — |
| Temperature na Operasyon | -40C to +100C (industrial) | -40C to +100C (Industrial) |
| Speed Grade | I2 (industrial) | — |
| Packhaging | 1932-BBGA, FC-FBGA | 1517-BBGA, FCBGA (F40), 40 x 40 mm, 1.00 mm pitch |
| Bilang ng Pins | 1932 | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Level ng MSL | [DATA_NEEDED: MSL level] | 3 (per JEDEC J-STD-020) |
| Tindminan RoHS | Compliant | Compliant |
| Transceivers | Up to 24 Gbps multi-gigabit | — |
| DSP Blocks | Variable-precision DSP (number per datasheet) | [DATA_NEEDED: DSP block count] |
| Logic Elements (LE) | — | 1,150,000 |
| Adaptive Logic Modules (ALM) | — | [DATA_NEEDED: ALM count] |
| Maximum User I/O | — | 600 |
| Transceiver Count | — | [DATA_NEEDED: transceiver count] |
| Maximum Transceiver Data Rate | — | 17.4 Gbps |
| Process Node | — | 20 nm |
| Supply Voltage (Core) | — | [DATA_NEEDED: VCC core voltage] |
| Configuration | — | Serial, Parallel, and Avalon-ST supported |
| Hardened IP | — | PCIe Gen3, 100G Ethernet MAC (per Quartus IP library) |
| Device Family Position | — | Mid-range 20 nm transceiver FPGA |