10AX115S4F45E3LG vs 10AX115N4F45E3LG Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 10AX115S4F45E3LG sa pamamagitan ng Intel at 10AX115N4F45E3LG sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
10AX115S4F45E3LG - Arria 10 GX FPGA, 1.15M LE, 1932-FCBGA | Intel
10AX115S4F45E3LG ✓ NakahandaPagsanggunian na paghahambing
| Parametro | 10AX115S4F45E3LG | 10AX115N4F45E3LG |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | Arria 10 GX | Arria 10 GX |
| Logic Elements | 1,150,000 | — |
| Embedded Memory | 68,857,856 bits (68.86 Mbit) | 68,857,856 bits (8,532 Kbits per M20K block) |
| Maximum User I/O | 624 | — |
| Packhaging | 1932-BBGA, FCBGA, 45 x 45 mm | 1932-ball FCBGA (F45, 45x45 mm) |
| Speed Grade | -3 (E3, extended grade) | — |
| Process Technology | 20 nm | TSMC 20nm |
| Core Voltage | 0.9 V | — |
| Transceiver Count (max) | [DATA_NEEDED: max transceiver count] | — |
| Transceiver Data Rate | up to 17.4 Gbps (chip-to-chip) | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | 3,376 (variable-precision, 18x19 multipliers) |
| Temperature na Operasyon | Extended (industrial grade) | Extended (E) industrial grade per ordering code |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Level ng MSL | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL rating] |
| Tindminan RoHS | Compliant | Compliant |
| Configuration Memory | On-chip, SRAM-based | — |
| Hardened PCIe | PCIe Gen3 hard IP | — |
| Logic Elements (LE) | — | 1,150,000 |
| Adaptive Logic Modules (ALM) | — | 427,200 |
| Maximum User I/O Pins | — | 768 |
| Transceivers | — | Up to 96 channels at up to 17.4 Gbps |
| Hard Processor System | — | Dual ARM Cortex-A9 MPCore |
| Memory Interfaces | — | DDR4, DDR3, QDR-IV, RLDRAM III (hard controller) |
| PCIe Hard IP | — | PCIe Gen3 x8 (hard IP block) |
| PLLs | — | 24 |
| Voltage Rails | — | Core 0.9 V, transceiver 1.0/1.1 V, I/O bank-dependent |