10CL055YF484I7G vs 10CL055YU484A7G Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 10CL055YF484I7G sa pamamagitan ng Intel at 10CL055YU484A7G sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | 10CL055YF484I7G | 10CL055YU484A7G |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Series | Cyclone 10 LP | Cyclone 10 LP |
| Family | Cyclone® 10 LP | — |
| Logic Elements (LE) | 55,856 | — |
| Embedded Memory (bits) | 2,396,160 | — |
| Number of Logic Array Blocks (LAB) | 3,478 | — |
| Number of M9K Memory Blocks | 260 | — |
| Embedded Multipliers (18x18) | 156 | — |
| Maximum User I/Os | 321 | — |
| Number of PLLs | 4 | — |
| Global Clock Networks | 20 | — |
| Temperature na Operasyon | -40C to +100C (Industrial) | — |
| Speed Grade | I7 | A7 (standard performance) |
| Packhaging | 484-BGA (FBGA, FineLine BGA) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (SMD/SMT) |
| Configuration Method | Active Serial (AS), Passive Serial (PS), JTAG | Serial / JTAG / Active Serial (AS) |
| Core Voltage | 1.2 V | — |
| Auxiliary Voltage | 2.5 V / 3.3 V | — |
| Tindminan RoHS | Compliant | Compliant |
| Process Technology | 60 nm low-power CMOS | 60 nm |
| Hard Memory Controller | DDR2 / DDR3 / LPDDR2 | — |
| Logic Elements | — | 55,856 LE |
| Embedded Memory | — | 2,396,160 bits (2.29 Mbit) |
| Number of User I/Os | — | 321 I/O |
| Package Type | — | 484-UBGA (Ultra FineLine BGA) |
| Operating Supply Voltage (Core) | — | 1.2 V |
| I/O Standard Support | — | LVCMOS / LVTTL (3.3 V, 2.5 V, 1.8 V, 1.5 V) |
| Minimum Operating Temperature | — | -40 C |
| Maximum Operating Temperature | — | +85 C (industrial) |
| Adaptive Logic Modules (ALMs) | — | [DATA_NEEDED: ALM count] |
| Embedded 18x18 Multipliers | — | Yes (DSP blocks) |
| PLL Count | — | [DATA_NEEDED: PLL count] |