10CL055YF484I7G vs 10CL080YF484I7G Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 10CL055YF484I7G sa pamamagitan ng Intel at 10CL080YF484I7G sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | 10CL055YF484I7G | 10CL080YF484I7G |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Series | Cyclone 10 LP | — |
| Family | Cyclone® 10 LP | Cyclone 10 LP |
| Logic Elements (LE) | 55,856 | 81,264 |
| Embedded Memory (bits) | 2,396,160 | — |
| Number of Logic Array Blocks (LAB) | 3,478 | — |
| Number of M9K Memory Blocks | 260 | — |
| Embedded Multipliers (18x18) | 156 | — |
| Maximum User I/Os | 321 | 289 |
| Number of PLLs | 4 | — |
| Global Clock Networks | 20 | — |
| Temperature na Operasyon | -40C to +100C (Industrial) | -40C to +100C (industrial, -I7 grade) |
| Speed Grade | I7 | -I7 (industrial, mid-tier) |
| Packhaging | 484-BGA (FBGA, FineLine BGA) | 484-ball FBGA (F484) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (FBGA) |
| Configuration Method | Active Serial (AS), Passive Serial (PS), JTAG | — |
| Core Voltage | 1.2 V | 1.0 V / 1.2 V |
| Auxiliary Voltage | 2.5 V / 3.3 V | — |
| Tindminan RoHS | Compliant | Compliant |
| Process Technology | 60 nm low-power CMOS | 60 nm low-power CMOS |
| Hard Memory Controller | DDR2 / DDR3 / LPDDR2 | — |
| Embedded Memory (Bits) | — | 2,810,880 |
| Embedded 18x18 Multipliers | — | 244 |
| PLLs | — | [DATA_NEEDED: PLL count] |
| Ball Pitch | — | [DATA_NEEDED: ball pitch] |
| I/O Standards Supported | — | LVDS, LVTTL, LVCMOS, SSTL, RSDS, HSTL, PCI |
| Memory Controller Hard IP | — | DDR3, DDR2, LPDDR2 |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |