10CL080YF484I7G vs 10CL055YF484C8G Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 10CL080YF484I7G sa pamamagitan ng Intel at 10CL055YF484C8G sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | 10CL080YF484I7G | 10CL055YF484C8G |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | Cyclone 10 LP | Cyclone 10 LP |
| Logic Elements (LE) | 81,264 | — |
| Embedded Memory (Bits) | 2,810,880 | — |
| Maximum User I/Os | 289 | — |
| Embedded 18x18 Multipliers | 244 | — |
| PLLs | [DATA_NEEDED: PLL count] | 4 |
| Packhaging | 484-ball FBGA (F484) | 484-FBGA (F484) |
| Ball Pitch | [DATA_NEEDED: ball pitch] | — |
| Core Voltage | 1.0 V / 1.2 V | 1.0 V |
| Process Technology | 60 nm low-power CMOS | 60 nm low-power CMOS |
| Temperature na Operasyon | -40C to +100C (industrial, -I7 grade) | — |
| Speed Grade | -I7 (industrial, mid-tier) | — |
| I/O Standards Supported | LVDS, LVTTL, LVCMOS, SSTL, RSDS, HSTL, PCI | — |
| Memory Controller Hard IP | DDR3, DDR2, LPDDR2 | — |
| Uri ng Pagpapasok | Surface Mount (FBGA) | Surface Mount |
| Tindminan RoHS | Compliant | Compliant |
| Level ng MSL | [DATA_NEEDED: MSL level] | 3 (168 hours) |
| Logic Elements | — | 55,856 |
| Embedded Memory | — | 2,396,160 bits |
| Maximum User I/O | — | 321 |
| DSP Blocks (18x18 Multipliers) | — | 156 |
| Memory Blocks | — | 56 M9K |
| Operating Temperature Grade | — | Commercial (0 C to 85 C) |
| I/O Bank Voltages | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Configuration | — | FPGA (SRAM-based, volatile) |