5CSEBA2U19C7SN vs 5CSEBA2U19C6N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 5CSEBA2U19C7SN sa pamamagitan ng Altera at 5CSEBA2U19C6N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
5CSEBA2U19C6N - Cyclone V SE SoC FPGA, 25K LE, ARM Cortex-A9 | Intel
5CSEBA2U19C6N ✓ NakahandaPagsanggunian na paghahambing
| Parametro | 5CSEBA2U19C7SN | 5CSEBA2U19C6N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | Cyclone V SE FPGA SoC | Cyclone V SE SoC FPGA |
| Device Variant | 5CSEA2 (single-core ARM Cortex-A9) | — |
| Logic Elements | 25,000 | 25 K |
| Processor Hard Core | Single ARM Cortex-A9 MPCore with CoreSight | — |
| Maximum Processor Frequency | 800 MHz | — |
| User I/O Count | 161 (5CSEBA2 variant) | — |
| Packhaging | 484-UBGA (19x19 mm) | 484-pin UBGA (19x19 mm) |
| Speed Grade | C7 (commercial) | — |
| Temperature na Operasyon | 0C to +85C (commercial, C7 suffix) | — |
| Process Technology | TSMC 28 nm low-power | TSMC 28 nm low-power |
| Memory Blocks | M10K + MLAB embedded RAM | — |
| DSP Blocks | Variable-precision DSP | Variable-precision DSP |
| HPS Memory Controller | DDR2, DDR3, LPDDR2, LPDDR | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Tindminan RoHS | Compliant | Compliant |
| Level ng MSL | 3 (per JEDEC J-STD-020) | — |
| Hard Processor System | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Maximum Clock Frequency | — | 925 MHz |
| Operating Temperature Grade | — | Commercial (other) |
| Memory Interfaces | — | DDR2, DDR3, LPDDR2 with ECC |
| HPS Peripherals | — | GbE, USB 2.0 OTG, SATA, CAN, UART, SPI, I2C, SD/SDIO/MMC |
| L2 Cache | — | 512 KB shared |
| L1 Cache per Core | — | 32 KB I-cache + 32 KB D-cache |
| FPGA-to-HPS Bridges | — | AXI-32/AXI-64, FPGA-to-SDRAM ports |