5CSEBA4U19I7 vs 5CSEBA4U19I7SN Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 5CSEBA4U19I7 sa pamamagitan ng Intel at 5CSEBA4U19I7SN sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
5CSEBA4U19I7 - Cyclone V SE SoC FPGA, 40K LE, Dual-A9, 484-UBGA | Intel / Altera
5CSEBA4U19I7 ✓ NakahandaIntel
5CSEBA4U19I7SN - Cyclone V SE SoC FPGA, 40K LE, ARM Cortex-A9 | Intel
5CSEBA4U19I7SN ✓ NakahandaPagsanggunian na paghahambing
| Parametro | 5CSEBA4U19I7 | 5CSEBA4U19I7SN |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Device Family | Cyclone V SE SoC FPGA | Cyclone V |
| Logic Elements | 40 K | 40,000 |
| Process Technology | 28 nm TSMC low-power | — |
| Core Voltage | 1.1 V | — |
| HPS Core | Dual-core ARM Cortex-A9 MPCore with CoreSight, NEON | — |
| HPS Maximum Frequency | 800 MHz | 800 MHz |
| FPGA Maximum Frequency | 400 MHz | — |
| DSP Blocks | 156 (18x18 multipliers) | — |
| Embedded Memory | M10K blocks | [DATA_NEEDED: total Kbits of M9K blocks] |
| Packhaging | 484-UBGA (U19), 19x19 mm, 1.0 mm pitch | 484-pin UBG A (19x19 mm) |
| Temperature na Operasyon | -40C to +100C (industrial, I7 grade) | -40C to +100C (Industrial) |
| HPS Peripherals | EMAC, USB 2.0, SD/MMC, NAND, SPI, I2C, UART, I2S | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Tindminan RoHS | Compliant | Compliant |
| Series | — | Cyclone V SE SoC FPGA |
| Hard Processor System (HPS) | — | Single ARM Cortex-A9 MPCore with CoreSight |
| Process Node | — | 28 nm low-power |
| Supply Voltage (Core) | — | 1.1 V (typical) |
| I/O Standards Supported | — | LVTTL, LVCMOS, LVDS, SSTL, HSTL (Cyclone V I/O family) |
| 18x18 Hardware Multipliers | — | [DATA_NEEDED: count] |
| PLLs | — | [DATA_NEEDED: count] |
| Transceivers | — | Not applicable (SE family, transceiver-less) |
| PCI Express Hard IP | — | Gen1 capable (rootport/endpoint) |
| DDR Memory Support | — | DDR2/DDR3/LPDDR2 via HPS and FPGA fabric |