5CSEBA5U19C6N vs 5CSEBA6U19C6N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 5CSEBA5U19C6N sa pamamagitan ng Intel at 5CSEBA6U19C6N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
5CSEBA5U19C6N - Cyclone V SE SoC FPGA, 85K LE, Dual ARM Cortex-A9 | Intel
5CSEBA5U19C6N ✓ NakahandaPagsanggunian na paghahambing
| Parametro | 5CSEBA5U19C6N | 5CSEBA6U19C6N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | Cyclone V SE SoC FPGA | — |
| Logic Elements | 85K | 110K |
| Hard Processor Cores | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Maximum HPS Clock Frequency | 925 MHz | — |
| Packhaging | 484-UBGA (19x19 mm) | 484-UBGA (UBGА, 19x19 mm) |
| Process Technology | 28 nm low-power | TSMC 28 nm low-power |
| Embedded Memory | Approximately 4,450 Kbits (per family datasheet) | — |
| DSP Blocks | 87 variable-precision | Variable-precision DSP |
| PLLs | 8 fractional | — |
| Maximum User I/O | 364 (per family datasheet) | — |
| Peripherals | CAN, USB OTG, Gigabit Ethernet, DDR3 controller, PCIe Gen2, I2C, SPI, UART | — |
| Temperature na Operasyon | Commercial (0C to +85C) per C6 speed/temp code | -40C to +100C (industrial) |
| Speed Grade | C6 | — |
| Tindminan RoHS | Compliant (per Altera product page) | Compliant (per Altera/Intel product page) |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Manufacturer | — | Altera (Intel) |
| Series | — | Cyclone V SE SoC FPGA |
| Device Variant | — | 5CSEA6 (U19 package) |
| HPS Architecture | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Frequency | — | 925 MHz |
| FPGA Speed Grade | — | -6 (industrial) |
| Bilang ng Pin | — | 484 |
| User I/O | — | 66 (per Heisener) / configurable LVDS/LVCMOS |
| Hard IP Blocks | — | PCIe Gen2, multi-port memory controller, ARM Cortex-A9 HPS |
| Memory | — | Embedded M10K blocks |
| Level ng MSL | — | 3 (per BGA package) |