5CSEBA5U19C7SN vs 5CSEBA4U19I7SN Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 5CSEBA5U19C7SN sa pamamagitan ng Intel at 5CSEBA4U19I7SN sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
5CSEBA5U19C7SN - Cyclone V SE SoC FPGA 85K LE, ARM Cortex-A9 | Intel
5CSEBA5U19C7SN ✓ NakahandaIntel
5CSEBA4U19I7SN - Cyclone V SE SoC FPGA, 40K LE, ARM Cortex-A9 | Intel
5CSEBA4U19I7SN ✓ NakahandaPagsanggunian na paghahambing
| Parametro | 5CSEBA5U19C7SN | 5CSEBA4U19I7SN |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | Cyclone V SE SoC FPGA | — |
| Device | 5CSEA5 | — |
| Logic Elements | 85,000 | 40,000 |
| Embedded Memory | 3.74 Mb | [DATA_NEEDED: total Kbits of M9K blocks] |
| DSP 18x18 Multipliers | 224 | — |
| Hard Processor System | Single ARM Cortex-A9 MPCore with CoreSight | — |
| HPS Maximum Frequency | 800 MHz | 800 MHz |
| User I/O Pins | [DATA_NEEDED: user I/O count for U19 package] | — |
| Process Technology | 28 nm TSMC low-power | — |
| Core Voltage | 1.1 V | — |
| Packhaging | 484-pin UBG (19x19 mm) | 484-pin UBG A (19x19 mm) |
| Package Code | FBGA / UBG | — |
| Operating Temperature Grade | Commercial (suffix C7) | — |
| Speed Grade | 7 | — |
| Tindminan RoHS | Compliant | Compliant |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Series | — | Cyclone V SE SoC FPGA |
| Device Family | — | Cyclone V |
| Hard Processor System (HPS) | — | Single ARM Cortex-A9 MPCore with CoreSight |
| Temperature na Operasyon | — | -40C to +100C (Industrial) |
| Process Node | — | 28 nm low-power |
| Supply Voltage (Core) | — | 1.1 V (typical) |
| I/O Standards Supported | — | LVTTL, LVCMOS, LVDS, SSTL, HSTL (Cyclone V I/O family) |
| 18x18 Hardware Multipliers | — | [DATA_NEEDED: count] |
| PLLs | — | [DATA_NEEDED: count] |
| Transceivers | — | Not applicable (SE family, transceiver-less) |
| PCI Express Hard IP | — | Gen1 capable (rootport/endpoint) |
| DDR Memory Support | — | DDR2/DDR3/LPDDR2 via HPS and FPGA fabric |