5CSEBA5U19I7N vs 5CSEBA6U19I7NTS Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 5CSEBA5U19I7N sa pamamagitan ng Intel at 5CSEBA6U19I7NTS sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
5CSEBA5U19I7N - Cyclone V SE SoC FPGA 85K LE Dual ARM Cortex-A9 | Intel
5CSEBA5U19I7N ✓ NakahandaIntel
5CSEBA6U19I7NTS - Cyclone V SE SoC FPGA, 110K LE, 925MHz, 484-UBGA | Intel
5CSEBA6U19I7NTS ✓ NakahandaPagsanggunian na paghahambing
| Parametro | 5CSEBA5U19I7N | 5CSEBA6U19I7NTS |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Product Type | SoC FPGA (System-on-Chip FPGA) | System-on-Chip FPGA (SoC FPGA) |
| Series | Cyclone V SE | Cyclone V SE |
| Logic Elements | 85,000 | 110K |
| Hard Processor System | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Core Frequency | 800 MHz (typical), up to 925 MHz | — |
| Process Technology | 28 nm TSMC low-power | — |
| Packhaging | 484-pin UBG (UFBGA) 19x19 mm | 484-ball UBGA (19x19 mm) |
| Volte ng Pagbibigay | 1.1 V core | — |
| FPGA User I/O | 66 (per datasheet front-page snippet) | — |
| Embedded Memory | Approximately 4,450 Kbits | — |
| DSP Blocks | 87 variable-precision (18x18 multipliers) | [DATA_NEEDED: DSP block count] |
| Transceivers | Up to 5 Gbps (Cyclone V SE feature) | — |
| HPS Peripherals | USB 2.0 OTG, EMAC, CAN, SPI, I2C, UART, SD/MMC, NAND | Gigabit Ethernet, USB 2.0 OTG, CAN, SPI, I2C, UART |
| Temperature na Operasyon | -40C to +100C (Industrial grade, suffix I) | -40C to +100C (Industrial, 'I7' speed grade) |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Level ng MSL | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL rating] |
| Tindminan RoHS | Compliant (per Heisener listing and product family) | Compliant |
| HPS Core | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Maximum Frequency | — | 925 MHz |
| FPGA Architecture | — | Cyclone V SE, 28 nm low-power process |
| Lead-Free | — | Yes |
| Configuration Method | — | SRAM-based, via Quartus Prime |
| Uri ng Memory | — | DDR3/DDR3L with ECC support |
| Device Family | — | Cyclone V |
| Family Variant | — | SE (SoC FPGA with HPS) |