5CSEBA6U19I7N vs 5CSEBA6U19C6N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 5CSEBA6U19I7N sa pamamagitan ng Intel at 5CSEBA6U19C6N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
5CSEBA6U19I7N - Cyclone V SE SoC FPGA, 110K LE, Dual ARM Cortex-A9 800MHz | Intel
5CSEBA6U19I7N ✓ Nakahanda
Pagsanggunian na paghahambing
| Parametro | 5CSEBA6U19I7N | 5CSEBA6U19C6N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | Cyclone V SE SoC FPGA | — |
| Series | 5CSEBA6 | Cyclone V SE SoC FPGA |
| Device Variant | 5CSEA6 (U19 package, 110K LE) | 5CSEA6 (U19 package) |
| Logic Elements | 110,000 | 110K |
| Hard Processor System | Dual-core ARM Cortex-A9 MPCore | — |
| HPS Maximum Frequency | 800 MHz | — |
| Embedded Memory | 4.45 Mbits (M10K + MLAB) | — |
| Hard Memory Controller | DDR3, DDR3L, LPDDR2 | — |
| Transceivers | Up to 9 channels, 3.125 Gbps | — |
| DSP Blocks | 112 (18x18 multipliers) | Variable-precision DSP |
| PLLs | 6 (FPGA) + 3 (HPS) | — |
| User I/O Banks | 8 | — |
| Maximum User I/O | 288 (package-dependent) | — |
| Packhaging | 484-pin UBGAFBGA (UBGA-484, 19x19 mm) | 484-UBGA (UBGА, 19x19 mm) |
| Temperature na Operasyon | -40C to +100C (Industrial) | -40C to +100C (industrial) |
| Process Technology | TSMC 28 nm low-power | TSMC 28 nm low-power |
| Volte ng Pagbibigay | Multi-rail (1.1 V core, 1.5/1.8/2.5/3.0/3.3 V I/O) | — |
| Configuration Modes | JTAG, Active Serial (AS), Passive Serial (PS), Fast Passive Parallel (FPP) | — |
| Tindminan RoHS | Compliant | Compliant (per Altera/Intel product page) |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Manufacturer | — | Altera (Intel) |
| HPS Architecture | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Frequency | — | 925 MHz |
| FPGA Speed Grade | — | -6 (industrial) |
| Bilang ng Pin | — | 484 |
| User I/O | — | 66 (per Heisener) / configurable LVDS/LVCMOS |
| Hard IP Blocks | — | PCIe Gen2, multi-port memory controller, ARM Cortex-A9 HPS |
| Memory | — | Embedded M10K blocks |
| Level ng MSL | — | 3 (per BGA package) |