5CSEBA6U23A7N vs 5CSXFC2C6U23A7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 5CSEBA6U23A7N sa pamamagitan ng Intel at 5CSXFC2C6U23A7N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
5CSXFC2C6U23A7N - Cyclone V SX SoC FPGA 25K LE | Altera | 672-UBGA
5CSXFC2C6U23A7N ✓ NakahandaPagsanggunian na paghahambing
| Parametro | 5CSEBA6U23A7N | 5CSXFC2C6U23A7N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | Cyclone V SE SoC FPGA | Cyclone V SX SoC FPGA |
| Logic Elements | 110,000 | 25,000 |
| Process Node | 28 nm low-power | — |
| Hard Processor System (HPS) | Dual-core ARM Cortex-A9 MPCore with CoreSight | — |
| HPS Clock Frequency | 700 MHz | — |
| Core Voltage | 1.1 V | 1.1 V |
| Packhaging | 672-UBGA (23x23 mm) | 672-UBGA (UFBGA) 23x23 mm |
| Automotive Qualification | AEC-Q100 compliant | — |
| Temperature na Operasyon | -40C to +85C (industrial) | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Level ng MSL | 3 (per JEDEC J-STD-020) | [DATA_NEEDED: MSL rating] |
| DSP Blocks | Variable-precision DSP blocks (per family datasheet) | — |
| Memory Interfaces | DDR3/DDR3L controller in HPS | — |
| Tindminan RoHS | RoHS compliant | Compliant |
| Shipping Media | Tray | — |
| Process Technology | — | 28 nm low-power |
| Hard Processor System | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Maximum Frequency | — | 700 MHz |
| Pin/Ball Count | — | 672 |
| Terminal Form | — | Ball |
| Package Code | — | FBGA |
| Operating Temperature Grade | — | Automotive |
| Lead-Free | — | Yes |