5CSEBA6U23I7LN vs 5CSEBA6U23C7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 5CSEBA6U23I7LN sa pamamagitan ng Intel at 5CSEBA6U23C7N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
5CSEBA6U23C7N - Cyclone V SE SoC FPGA 110K LE Dual A9 672-UBGA | Intel
5CSEBA6U23C7N ✓ NakahandaPagsanggunian na paghahambing
| Parametro | 5CSEBA6U23I7LN | 5CSEBA6U23C7N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | Cyclone V SE SoC FPGA | Cyclone V SE SoC FPGA |
| Logic Elements | 110,000 | 110,000 |
| Processor Cores | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Maximum CPU Clock | 925 MHz | — |
| Packhaging | 672-pin UBGA (UBG-672) 23x23 mm | 672-UBGA (23x23 mm) |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Speed Grade | I7 (fast) | — |
| Temperature Range | Industrial (-40C to +100C junction) | — |
| Suffix L | Lead-free | — |
| Suffix N | Tray packaging | — |
| Tindminan RoHS | Compliant (lead-free suffix) | Compliant |
| Hard Memory Blocks | [DATA_NEEDED: total M10K and MLAB bits] | — |
| DSP Blocks | [DATA_NEEDED: variable-precision DSP block count] | Variable-precision DSP blocks |
| HPS Peripherals | Gigabit Ethernet, USB 2.0 OTG, CAN, SPI, I2C, UART, SD/SDIO | — |
| Configuration Mode | JTAG and Active Serial (AS) | — |
| Process Node | TSMC 28 nm low-power | — |
| Design Toolchain | Intel Quartus Prime + SoC EDS | — |
| Hard Processor System (HPS) | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Maximum Frequency | — | 800 MHz |
| Process Technology | — | 28 nm low-power (TSMC) |
| Core Voltage | — | 1.1 V |
| Temperature na Operasyon | — | 0C to +85C (commercial) |
| FPGA Fabric | — | Cyclone V SE 5CSEA6 |
| Memory Interface | — | DDR3 hard controller with PHY |
| Transceivers | — | Per Cyclone V SE family architecture |
| Level ng MSL | — | 3 |