5CSXFC4C6U23A7N vs 5CSXFC4C6U23I7LN Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 5CSXFC4C6U23A7N sa pamamagitan ng Intel at 5CSXFC4C6U23I7LN sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
5CSXFC4C6U23A7N - Cyclone V SX SoC FPGA 40K LE, ARM Cortex-A9 | Intel
5CSXFC4C6U23A7N ✓ NakahandaAltera
5CSXFC4C6U23I7LN - Cyclone V SX SoC FPGA 40K LE Dual ARM Cortex-A9 925MHz 672-UBGA | Altera
5CSXFC4C6U23I7LN ✓ NakahandaPagsanggunian na paghahambing
| Parametro | 5CSXFC4C6U23A7N | 5CSXFC4C6U23I7LN |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Series | Cyclone V SX SoC FPGA | — |
| Device Family | Cyclone V SX (5CSXFC4C6U23) | — |
| Logic Elements | 40,000 | 40,000 |
| Hard Processor System | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Maximum User I/O | 188 | — |
| Packhaging | 672-pin UFBGA (UBGA), 23x23 mm | 672-ball UBGA (23x23 mm) |
| Process Technology | 28 nm low-power | 28 nm low-power |
| Core Voltage | 1.1 V (typical) | — |
| Operating Temperature Grade | Automotive / Extended | — |
| Memory Interfaces | DDR2, DDR3, LPDDR2 | — |
| DSP Blocks | Variable-precision, 18x19 multipliers | [DATA_NEEDED: variable-precision DSP count] |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Tindminan RoHS | Compliant | Compliant |
| Lead Free | Yes | — |
| Level ng MSL | [DATA_NEEDED: moisture sensitivity level] | [DATA_NEEDED: moisture sensitivity level] |
| Family | — | Cyclone V SX SoC FPGA |
| Device Variant | — | 5CSXFC4 (U23 package code) |
| Processor Cores | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| Maximum Processor Clock | — | 925 MHz |
| Temperature na Operasyon | — | -40C to +100C (Industrial) |
| Speed Grade | — | I7 |
| Embedded Memory | — | [DATA_NEEDED: total block RAM bits] |
| Transceivers | — | Integrated high-speed transceivers (PCIe Gen2 capable) |
| User I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Lead-Free | — | Yes |