5CSXFC5C6U23C8N vs 5CSXFC6C6U23C8N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 5CSXFC5C6U23C8N sa pamamagitan ng Intel at 5CSXFC6C6U23C8N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
5CSXFC6C6U23C8N - Cyclone V SX SoC FPGA, 110K LE, ARM Cortex-A9 | Intel
5CSXFC6C6U23C8N ✓ NakahandaPagsanggunian na paghahambing
| Parametro | 5CSXFC5C6U23C8N | 5CSXFC6C6U23C8N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | Cyclone V SX | Cyclone V SX (SoC FPGA) |
| Device Variant | 5CSXFC5 (5CSXC5 logic density) | — |
| Logic Elements | 85,000 | 110,000 |
| Logic Array Blocks (LABs) | 3,207 | — |
| Maximum User I/O Pins | 145 | — |
| HPS Processor Cores | Dual ARM Cortex-A9 MPCore | — |
| HPS Maximum Frequency | 600 MHz | — |
| Process Technology | 28 nm TSMC low-power | 28 nm low-power (TSMC) |
| Core Voltage | 1.1 V | 1.1 V |
| Temperature na Operasyon | 0 C to +85 C (commercial) | -40C to +100C (industrial grade, code C) |
| Packhaging | 672-pin UBGAFBGA (23x23 mm) | 672-pin UFBGA (UBGA), 23x23 mm |
| Integrated Transceivers | 3.125 Gbps | — |
| Hard Memory Controller | DDR3 (HPS side) | — |
| Speed Grade | C8 | C8 (commercial speed grade 8) |
| Lead-Free / RoHS | Yes | — |
| Series | — | Cyclone V SX |
| Architecture | — | MCU + FPGA (Hard Processor System + FPGA fabric) |
| Hard Processor System (HPS) | — | Dual-core ARM Cortex-A9 MPCore with CoreSight |
| Processor Maximum Frequency | — | 600 MHz |
| HPS L1 Cache | — | 32 KB instruction + 32 KB data per core |
| HPS L2 Cache | — | 512 KB shared |
| DSP Blocks | — | Variable-precision DSP (number not specified in retrieved data) |
| Embedded Memory | — | M10K blocks (total Kbits [DATA_NEEDED: total embedded memory Kbits]) |
| Transceivers | — | Up to 3.125 Gbps integrated transceivers |
| Maximum User I/O | — | 145 user I/O (per DigChip summary; full count per package [DATA_NEEDED: package pinout max user I/O]) |
| Memory Controller | — | Hard controller supporting DDR2, DDR3, LPDDR2 |
| Uri ng Pagpapasok | — | Surface Mount (BGA) |
| Level ng MSL | — | 3 (per JEDEC J-STD-020, typical for large BGA) |
| Tindminan RoHS | — | Compliant |
| Lead-Free / Halogen-Free | — | Yes (lead-free BGA; halogen status [DATA_NEEDED: halogen-free yes/no]) |
| Lifecycle | — | Active (Cyclone V family in production) |