5M1270ZF256C5N vs 5M1270ZF256I5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 5M1270ZF256C5N sa pamamagitan ng Altera at 5M1270ZF256I5N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | 5M1270ZF256C5N | 5M1270ZF256I5N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX V | MAX V |
| Series | 5M1270Z | — |
| Device Type | CPLD - Complex Programmable Logic Device | — |
| Macro Cells | 980 | 980 |
| Logic Elements (LE) | 1270 | — |
| User I/Os (Max) | 212 | — |
| Configuration Memory | 8 Kbits User Flash Memory (UFM), non-volatile | Non-volatile flash (instant-on) |
| Maximum Operating Frequency | 201.1 MHz | 201.1 MHz |
| Core Supply Voltage (VCCINT) | 1.8 V | 1.8 V |
| I/O Supply Voltages (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (5.0 V tolerant inputs) | — |
| Packhaging | 256-ball FBGA (FineLine BGA) | 256-ball FBGA |
| Uri ng Pagpapasok | Surface Mount | — |
| Temperature na Operasyon | 0 C to +85 C (Commercial) | -40C to +100C (Industrial) |
| Propagation Delay (tPD) | [DATA_NEEDED: tPD max] | — |
| Internal Oscillator | Yes (on-chip, supports user logic) | — |
| Programming Interface | JTAG (IEEE 1149.1), ByteBlaster | JTAG, Active Serial, Active Parallel |
| Process Node | 0.30 µm | — |
| Tindminan RoHS | Compliant | Compliant |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| I/O Bank Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| User Flash Memory (UFM) | — | 8 Kbits |
| User I/O Pins (max) | — | 212 |
| Process Technology | — | 0.18 um CMOS |
| Typical Quiescent Power | — | [DATA_NEEDED: typical quiescent power in mW] |
| Pin-to-Pin Delay (tPD) | — | [DATA_NEEDED: tPD in ns] |
| Lead-Free | — | Yes |