5M160ZE64A5N vs 5M2210ZF324A5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 5M160ZE64A5N sa pamamagitan ng Altera at 5M2210ZF324A5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
5M160ZE64A5N - 128 Macro Cell MAX V CPLD, 118.3MHz, 64-EQFP | Altera
5M160ZE64A5N ✓ Nakahanda
Pagsanggunian na paghahambing
| Parametro | 5M160ZE64A5N | 5M2210ZF324A5N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX V | MAX V |
| Device | 5M160ZE64A5N | — |
| Macro Cells | 128 | — |
| Logic Elements | 160 | — |
| User I/O Pins | 54 | — |
| Maximum Operating Frequency | 118.3 MHz | — |
| Pin-to-Pin Propagation Delay | 7.5 ns | — |
| User Flash Memory | 8 Kbits | 8 Kbit |
| Core Voltage (VCCINT) | 1.8 V (1.71 V to 1.89 V) | — |
| I/O Voltage Support | 1.5 V, 1.8 V, 2.5 V, 3.3 V | — |
| Packhaging | 64-pin EQFP (exposed-pad QFP) | 324-ball FineLine BGA (FBGA-324) |
| Temperature na Operasyon | -40C to +125C (automotive AEC-Q100) | -40C to +125C (Automotive / AEC-Q100 Grade 3) |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | JTAG (IEEE 1149.1), In-System Programmable |
| Configuration Method | Non-volatile flash, instant-on | — |
| Tindminan RoHS | Compliant | Compliant |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Logic Elements / Macrocells | — | 2210 / 1700 |
| User I/Os (max) | — | 271 |
| Core Voltage | — | 1.8 V |
| I/O Standards Supported | — | 1.5 V, 1.8 V, 2.5 V, 3.3 V LVTTL/LVCMOS |
| Maximum Internal Frequency | — | 201.1 MHz |
| Typical Quiescent Current | — | 2 mA |
| Configuration Memory | — | Non-volatile Flash |
| Moisture Sensitivity Level (JEDEC J-STD-020) | — | MSL 3 |