5M160ZE64C4N vs 5M160ZE64A5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 5M160ZE64C4N sa pamamagitan ng Intel at 5M160ZE64A5N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
5M160ZE64A5N - 128 Macro Cell MAX V CPLD, 118.3MHz, 64-EQFP | Altera
5M160ZE64A5N ✓ NakahandaPagsanggunian na paghahambing
| Parametro | 5M160ZE64C4N | 5M160ZE64A5N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX V | MAX V |
| Device | 5M160Z | 5M160ZE64A5N |
| Logic Elements / Macrocells | 128 | — |
| Maximum User I/Os | 54 | — |
| User Flash Memory | 8 Kbits | 8 Kbits |
| Core Voltage | 1.8 V | — |
| I/O Voltage Support | 1.8 V / 2.5 V / 3.3 V MultiVolt | 1.5 V, 1.8 V, 2.5 V, 3.3 V |
| Speed Grade | C4 (tPD1 ~4.0 ns) | — |
| Temperature na Operasyon | 0 C to +85 C (Commercial) | -40C to +125C (automotive AEC-Q100) |
| Packhaging | EQFP-64 (E64), 7x7x1.4 mm, 0.4 mm pitch | 64-pin EQFP (exposed-pad QFP) |
| Configuration | Non-volatile flash, instant-on | — |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | JTAG (IEEE 1149.1) / ISP |
| Internal Oscillator | Yes (programmable) | — |
| I/O Standards | LVTTL, LVCMOS, PCI, SSTL-2/3 | — |
| Tindminan RoHS | Compliant | Compliant |
| Level ng MSL | 3 | — |
| Supply Voltage (VCCINT) | 1.71 V to 1.89 V | — |
| Supply Voltage (VCCIO) | 1.2 V to 3.3 V | — |
| Macro Cells | — | 128 |
| Logic Elements | — | 160 |
| User I/O Pins | — | 54 |
| Maximum Operating Frequency | — | 118.3 MHz |
| Pin-to-Pin Propagation Delay | — | 7.5 ns |
| Core Voltage (VCCINT) | — | 1.8 V (1.71 V to 1.89 V) |
| Configuration Method | — | Non-volatile flash, instant-on |
| Uri ng Pagpapasok | — | Surface Mount |