5M160ZM68A5N vs 5M80ZM68A5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 5M160ZM68A5N sa pamamagitan ng Altera at 5M80ZM68A5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | 5M160ZM68A5N | 5M80ZM68A5N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX V | MAX V |
| Device Variant | 5M160Z (128 macrocells, 1.8 V, speed grade -7) | — |
| Macrocells | 128 | — |
| Logic Array Blocks (LABs) | 4 | — |
| User I/Os | 52 | 52 |
| User Flash Memory | 8 Kbits | — |
| Propagation Delay (tPD) | 14 ns | 14 ns (max) |
| Standby Current (ICCSTBY) | 25 uA (typical) | 25 uA typical |
| Core Supply Voltage (VCCINT) | 1.8 V (1.71 V to 1.89 V) | — |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| Packhaging | 68-ball FBGA (FineLine BGA), 0.5 mm pitch | 68-ball Micro FBGA (MBGA) |
| JEDEC Package Code | S-PBGA-B68 | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Temperature na Operasyon | -40C to +125C (industrial) | -40C to +105C |
| Programming Interface | IEEE Std 1149.1 JTAG BST | — |
| Automotive Qualification | AEC-Q100 | AEC-Q100 |
| Tindminan RoHS | Compliant | Compliant |
| Device Type | — | CPLD - Complex Programmable Logic Device |
| Macro Cells | — | 64 |
| Logic Elements (approx.) | — | 128 |
| Number of Pins / Terminals | — | 68 |
| Core Voltage (VCCINT) | — | 1.8 V |
| Maximum Internal Frequency | — | 118.3 MHz |
| Program Memory Type | — | Flash (non-volatile) |
| In-System Programmability | — | Yes (JTAG) |
| Boundary Scan (IEEE 1149.1) | — | Yes |