5M160ZT100C4N vs 5M160ZT100C5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 5M160ZT100C4N sa pamamagitan ng Intel at 5M160ZT100C5N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | 5M160ZT100C4N | 5M160ZT100C5N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX V | — |
| Logic Elements (LEs) | 160 | 160 |
| Macrocells | 128 | — |
| User I/Os | 79 | 79 |
| User Flash Memory (UFM) | 8 Kbits | 8 Kbits |
| Pin-to-Pin Logic Delay (tPD) | 7.9 ns | — |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Bank Supply (VCCIO) | 1.2 V to 3.3 V | — |
| Configuration Memory | Non-volatile flash | — |
| Programmability | In-system via JTAG (IEEE 1149.1) | — |
| Packhaging | TQFP-100 (100-pin) | TQFP-100 |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Operating Temperature Grade | Commercial (0 C to +85 C) | — |
| Level ng MSL | 3 | 3 |
| Tindminan RoHS | Compliant | Compliant |
| Lead-Free | Yes | Yes |
| Logic Array Blocks (LABs) | 2 | — |
| Series | — | MAX V |
| Device Family | — | MAX V CPLD |
| Macro Cells | — | 128 |
| Number of Logic Array Blocks (LABs) | — | 8 |
| Propagation Delay (tPD) | — | 7.5 ns |
| Maximum Operating Frequency | — | 152 MHz (typical, internal) |
| Core Voltage (VCCINT) | — | 1.8 V |
| I/O Voltage (VCCIO) | — | 1.5 V to 3.3 V |
| Temperature na Operasyon | — | 0 °C to +85 °C (commercial) |
| Programming Interface | — | JTAG (IEEE 1149.1) - in-system |