5M160ZT100C5N vs 5M160ZM100C5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng 5M160ZT100C5N sa pamamagitan ng Altera at 5M160ZM100C5N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | 5M160ZT100C5N | 5M160ZM100C5N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Series | MAX V | — |
| Device Family | MAX V CPLD | MAX V |
| Macro Cells | 128 | 128 |
| Logic Elements (LEs) | 160 | — |
| User I/Os | 79 | 79 |
| Number of Logic Array Blocks (LABs) | 8 | — |
| Propagation Delay (tPD) | 7.5 ns | 7.9 ns |
| Maximum Operating Frequency | 152 MHz (typical, internal) | — |
| User Flash Memory (UFM) | 8 Kbits | — |
| Core Voltage (VCCINT) | 1.8 V | 1.8 V |
| I/O Voltage (VCCIO) | 1.5 V to 3.3 V | 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Temperature na Operasyon | 0 °C to +85 °C (commercial) | 0C to +85C (commercial) |
| Packhaging | TQFP-100 | 100-ball Micro FBGA (MBGA-100), 6 x 6 mm, 0.5 mm pitch |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | 3 | 3 (168 hours) |
| Tindminan RoHS | Compliant | Compliant |
| Lead-Free | Yes | — |
| Programming Interface | JTAG (IEEE 1149.1) - in-system | JTAG (IEEE 1532 / IEEE 1149.1) |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Elements | — | 160 |
| Maximum Internal Frequency | — | 184 MHz |
| Configuration Memory | — | Internal Flash (non-volatile) |
| Supported I/O Standards | — | LVCMOS, LVTTL, PCI (Bank 1 only via VCCIO) |